diff options
author | 2014-05-28 22:43:01 -0700 | |
---|---|---|
committer | 2014-05-29 20:50:49 -0700 | |
commit | cf4035a4c41ccfcc3e89a0cee25f5218a11b0705 (patch) | |
tree | 323d9e98e6129c67e464a3e6857ee02593a2f2c2 /compiler/utils/arm64/assembler_arm64.cc | |
parent | 29b53d3d715b1ec19349e8cbf7c5e4ff529bd5fe (diff) |
ART: Use StackReference in Quick Stack Frame
The method reference at the bottom of a quick frame is a stack
reference and not a native pointer. This is important for 64b
architectures, where the notions do not coincide.
Change key methods to have StackReference<mirror::ArtMethod>*
parameter instead of mirror::ArtMethod**. Make changes to
invoke stubs for 64b archs, change the frame setup for JNI code
(both generic JNI and compilers), tie up loose ends.
Tested on x86 and x86-64 with host tests. On x86-64, tests succeed
with jni compiler activated. x86-64 QCG was not tested.
Tested on ARM32 with device tests.
Fix ARM64 not saving x19 (used for wSUSPEND) on upcalls.
Tested on ARM64 in interpreter-only + generic-jni mode.
Fix ARM64 JNI Compiler to work with the CL.
Tested on ARM64 in interpreter-only + jni compiler.
Change-Id: I77931a0cbadd04d163b3eb8d6f6a6f8740578f13
Diffstat (limited to 'compiler/utils/arm64/assembler_arm64.cc')
-rw-r--r-- | compiler/utils/arm64/assembler_arm64.cc | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/compiler/utils/arm64/assembler_arm64.cc b/compiler/utils/arm64/assembler_arm64.cc index 27188b2331..009b227209 100644 --- a/compiler/utils/arm64/assembler_arm64.cc +++ b/compiler/utils/arm64/assembler_arm64.cc @@ -530,7 +530,7 @@ void Arm64Assembler::Call(FrameOffset base, Offset offs, ManagedRegister m_scrat Arm64ManagedRegister scratch = m_scratch.AsArm64(); CHECK(scratch.IsCoreRegister()) << scratch; // Call *(*(SP + base) + offset) - LoadFromOffset(scratch.AsCoreRegister(), SP, base.Int32Value()); + LoadWFromOffset(kLoadWord, scratch.AsOverlappingCoreRegisterLow(), SP, base.Int32Value()); LoadFromOffset(scratch.AsCoreRegister(), scratch.AsCoreRegister(), offs.Int32Value()); ___ Blr(reg_x(scratch.AsCoreRegister())); } @@ -656,16 +656,17 @@ void Arm64Assembler::BuildFrame(size_t frame_size, ManagedRegister method_reg, // trashed by native code. ___ Mov(reg_x(ETR), reg_x(TR)); - // Increate frame to required size - must be at least space to push Method*. + // Increase frame to required size - must be at least space to push StackReference<Method>. CHECK_GT(frame_size, kCalleeSavedRegsSize * kFramePointerSize); size_t adjust = frame_size - (kCalleeSavedRegsSize * kFramePointerSize); IncreaseFrameSize(adjust); - // Write Method*. - StoreToOffset(X0, SP, 0); + // Write StackReference<Method>. + DCHECK_EQ(4U, sizeof(StackReference<mirror::ArtMethod>)); + StoreWToOffset(StoreOperandType::kStoreWord, W0, SP, 0); // Write out entry spills - int32_t offset = frame_size + kFramePointerSize; + int32_t offset = frame_size + sizeof(StackReference<mirror::ArtMethod>); for (size_t i = 0; i < entry_spills.size(); ++i) { Arm64ManagedRegister reg = entry_spills.at(i).AsArm64(); if (reg.IsNoRegister()) { |