diff options
author | 2015-09-14 15:13:26 +0100 | |
---|---|---|
committer | 2015-10-14 12:20:59 +0100 | |
commit | d2b4ca2d02c86b1ce1826fd2b35ce6c9c58c1ff1 (patch) | |
tree | dab4cdfacd3e7cb529f3b0de931c8a173039571f /compiler/utils/arm/assembler_thumb2.cc | |
parent | fb11bab9bc96ff05dcb12f43abf58df256b7c7aa (diff) |
Improve Thumb2 bitwise operations.
Allow embedding constants in AND, ORR, EOR. Add ORN to
assembler, use BIC and ORN for AND and ORR when needed.
Change-Id: I24d69ecc7ce6992b9c5eb7a313ff47a942de9661
Diffstat (limited to 'compiler/utils/arm/assembler_thumb2.cc')
-rw-r--r-- | compiler/utils/arm/assembler_thumb2.cc | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/compiler/utils/arm/assembler_thumb2.cc b/compiler/utils/arm/assembler_thumb2.cc index 0f6c4f5a34..b8c5fd2e2b 100644 --- a/compiler/utils/arm/assembler_thumb2.cc +++ b/compiler/utils/arm/assembler_thumb2.cc @@ -410,6 +410,7 @@ bool Thumb2Assembler::ShifterOperandCanHold(Register rd ATTRIBUTE_UNUSED, case MOV: // TODO: Support less than or equal to 12bits. return ArmAssembler::ModifiedImmediate(immediate) != kInvalidModifiedImmediate; + case MVN: default: return ArmAssembler::ModifiedImmediate(immediate) != kInvalidModifiedImmediate; @@ -492,6 +493,12 @@ void Thumb2Assembler::orr(Register rd, Register rn, const ShifterOperand& so, } +void Thumb2Assembler::orn(Register rd, Register rn, const ShifterOperand& so, + Condition cond, SetCc set_cc) { + EmitDataProcessing(cond, ORN, set_cc, rn, rd, so); +} + + void Thumb2Assembler::mov(Register rd, const ShifterOperand& so, Condition cond, SetCc set_cc) { EmitDataProcessing(cond, MOV, set_cc, R0, rd, so); @@ -1105,6 +1112,7 @@ bool Thumb2Assembler::Is32BitDataProcessing(Condition cond, rn_is_valid = false; // There is no Rn for these instructions. break; case TEQ: + case ORN: return true; case ADD: case SUB: @@ -1222,6 +1230,7 @@ void Thumb2Assembler::Emit32BitDataProcessing(Condition cond ATTRIBUTE_UNUSED, case MOV: thumb_opcode = 2U /* 0b0010 */; rn = PC; break; case BIC: thumb_opcode = 1U /* 0b0001 */; break; case MVN: thumb_opcode = 3U /* 0b0011 */; rn = PC; break; + case ORN: thumb_opcode = 3U /* 0b0011 */; break; default: break; } |