summaryrefslogtreecommitdiff
path: root/compiler/optimizing
diff options
context:
space:
mode:
author Roland Levillain <rpl@google.com> 2015-04-14 16:34:44 +0000
committer Gerrit Code Review <noreply-gerritcodereview@google.com> 2015-04-14 16:34:45 +0000
commit8d20011a9de7cd94bee59db3ae8c0cbbf55911d9 (patch)
treee8f0656ae879c27175c7287086ee8fd70c24b93a /compiler/optimizing
parent85806723695120d183e85e9d12d52340b839b781 (diff)
parent760d8efd535764e54500bf65a944ed3f2a54c123 (diff)
Merge "Opt Compiler: ARM64 goodness"
Diffstat (limited to 'compiler/optimizing')
-rw-r--r--compiler/optimizing/code_generator_arm64.cc2
-rw-r--r--compiler/optimizing/common_arm64.h3
2 files changed, 3 insertions, 2 deletions
diff --git a/compiler/optimizing/code_generator_arm64.cc b/compiler/optimizing/code_generator_arm64.cc
index 33eacbaf08..0fa4fa4256 100644
--- a/compiler/optimizing/code_generator_arm64.cc
+++ b/compiler/optimizing/code_generator_arm64.cc
@@ -1380,7 +1380,7 @@ void LocationsBuilderARM64::VisitBoundsCheck(HBoundsCheck* instruction) {
LocationSummary* locations =
new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall);
locations->SetInAt(0, Location::RequiresRegister());
- locations->SetInAt(1, Location::RequiresRegister());
+ locations->SetInAt(1, ARM64EncodableConstantOrRegister(instruction->InputAt(1), instruction));
if (instruction->HasUses()) {
locations->SetOut(Location::SameAsFirstInput());
}
diff --git a/compiler/optimizing/common_arm64.h b/compiler/optimizing/common_arm64.h
index 966165bf4c..53f1f3c45c 100644
--- a/compiler/optimizing/common_arm64.h
+++ b/compiler/optimizing/common_arm64.h
@@ -194,7 +194,8 @@ static bool CanEncodeConstantAsImmediate(HConstant* constant, HInstruction* inst
int64_t value = CodeGenerator::GetInt64ValueOf(constant);
- if (instr->IsAdd() || instr->IsSub() || instr->IsCondition() || instr->IsCompare()) {
+ if (instr->IsAdd() || instr->IsSub() || instr->IsCondition() ||
+ instr->IsCompare() || instr->IsBoundsCheck()) {
// Uses aliases of ADD/SUB instructions.
return vixl::Assembler::IsImmAddSub(value);
} else if (instr->IsAnd() || instr->IsOr() || instr->IsXor()) {