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| author | 2016-01-20 17:02:00 -0800 | |
|---|---|---|
| committer | 2016-01-20 19:19:24 -0800 | |
| commit | 086d27e2ef9d11138f8832190d09a56e72346f15 (patch) | |
| tree | 30217b1a5b8bb0cfdb6c351058678a7ad128950f /compiler/optimizing | |
| parent | 0021c310e2e613d6d180acda0d9d422dba8688b0 (diff) | |
Fix missing case in ARM64 codegen.
Rationale:
Rather than excluding conditions that are not handled,
changed the right-hand-side is zero optimized code
to list handled conditions explicitly instead.
bug=26689526
Change-Id: I636e01548659c579d9e318f07bda2c24a12371e5
Diffstat (limited to 'compiler/optimizing')
| -rw-r--r-- | compiler/optimizing/code_generator_arm64.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/compiler/optimizing/code_generator_arm64.cc b/compiler/optimizing/code_generator_arm64.cc index 2cb2741b17..3d65e9c53c 100644 --- a/compiler/optimizing/code_generator_arm64.cc +++ b/compiler/optimizing/code_generator_arm64.cc @@ -2820,7 +2820,8 @@ void InstructionCodeGeneratorARM64::GenerateTestAndBranch(HInstruction* instruct non_fallthrough_target = true_target; } - if ((arm64_cond != gt && arm64_cond != le) && rhs.IsImmediate() && (rhs.immediate() == 0)) { + if ((arm64_cond == eq || arm64_cond == ne || arm64_cond == lt || arm64_cond == ge) && + rhs.IsImmediate() && (rhs.immediate() == 0)) { switch (arm64_cond) { case eq: __ Cbz(lhs, non_fallthrough_target); |