ART: Refactor SIMD slots and regs size processing.

ART vectorizer assumes that there is single size of SIMD
register used for the whole program. Make this assumption explicit
and refactor the code.

Note: This is a base for the future introduction of SIMD slots of
size other than 8 or 16 bytes.

Test: test-art-target, test-art-host.
Change-Id: Id699d5e3590ca8c655ecd9f9ed4e63f49e3c4f9c

1 files changed, 8 insertions, 7 deletions

diff --git a/compiler/optimizing/superblock_cloner.cc b/compiler/optimizing/superblock_cloner.cc
index dc433feb51..9f7a316b50 100644
--- a/compiler/optimizing/superblock_cloner.cc
+++ b/compiler/optimizing/superblock_cloner.cc
@@ -742,14 +742,15 @@ void SuperblockCloner::VerifyGraph() {
       DCHECK(it.second->GetBlock() != nullptr);
     }
   }
-
-  GraphChecker checker(graph_);
-  checker.Run();
-  if (!checker.IsValid()) {
-    for (const std::string& error : checker.GetErrors()) {
-      std::cout << error << std::endl;
+  if (kSuperblockClonerVerify) {
+    GraphChecker checker(graph_);
+    checker.Run();
+    if (!checker.IsValid()) {
+      for (const std::string& error : checker.GetErrors()) {
+        std::cout << error << std::endl;
+      }
+      LOG(FATAL) << "GraphChecker failed: superblock cloner\n";
     }
-    LOG(FATAL) << "GraphChecker failed: superblock cloner\n";
   }
 }