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author Nicolas Geoffray <ngeoffray@google.com> 2017-09-02 12:54:16 +0000
committer Nicolas Geoffray <ngeoffray@google.com> 2017-09-02 12:54:16 +0000
commit982334cef17d47ef2477d88a97203a9587a4b86f (patch)
tree7e65d03a4533f21286cf68e66696bd0a7a54ef54 /compiler/optimizing/scheduler_arm64.cc
parentcfa59b49cde265dc5329a7e6956445f9f7a75f15 (diff)
Revert "Basic SIMD reduction support."
Fails 530-checker-lse on arm64. Bug: 64091002, 65212948 This reverts commit cfa59b49cde265dc5329a7e6956445f9f7a75f15. Change-Id: Icb5d6c805516db0a1d911c3ede9a246ccef89a22
Diffstat (limited to 'compiler/optimizing/scheduler_arm64.cc')
-rw-r--r--compiler/optimizing/scheduler_arm64.cc16
1 files changed, 6 insertions, 10 deletions
diff --git a/compiler/optimizing/scheduler_arm64.cc b/compiler/optimizing/scheduler_arm64.cc
index 1d9d28ab24..510619faf9 100644
--- a/compiler/optimizing/scheduler_arm64.cc
+++ b/compiler/optimizing/scheduler_arm64.cc
@@ -215,12 +215,12 @@ void SchedulingLatencyVisitorARM64::VisitVecReplicateScalar(
last_visited_latency_ = kArm64SIMDReplicateOpLatency;
}
-void SchedulingLatencyVisitorARM64::VisitVecExtractScalar(HVecExtractScalar* instr) {
- HandleSimpleArithmeticSIMD(instr);
+void SchedulingLatencyVisitorARM64::VisitVecSetScalars(HVecSetScalars* instr) {
+ LOG(FATAL) << "Unsupported SIMD instruction " << instr->GetId();
}
-void SchedulingLatencyVisitorARM64::VisitVecReduce(HVecReduce* instr) {
- HandleSimpleArithmeticSIMD(instr);
+void SchedulingLatencyVisitorARM64::VisitVecSumReduce(HVecSumReduce* instr) {
+ LOG(FATAL) << "Unsupported SIMD instruction " << instr->GetId();
}
void SchedulingLatencyVisitorARM64::VisitVecCnv(HVecCnv* instr ATTRIBUTE_UNUSED) {
@@ -283,8 +283,8 @@ void SchedulingLatencyVisitorARM64::VisitVecAnd(HVecAnd* instr ATTRIBUTE_UNUSED)
last_visited_latency_ = kArm64SIMDIntegerOpLatency;
}
-void SchedulingLatencyVisitorARM64::VisitVecAndNot(HVecAndNot* instr ATTRIBUTE_UNUSED) {
- last_visited_latency_ = kArm64SIMDIntegerOpLatency;
+void SchedulingLatencyVisitorARM64::VisitVecAndNot(HVecAndNot* instr) {
+ LOG(FATAL) << "Unsupported SIMD instruction " << instr->GetId();
}
void SchedulingLatencyVisitorARM64::VisitVecOr(HVecOr* instr ATTRIBUTE_UNUSED) {
@@ -307,10 +307,6 @@ void SchedulingLatencyVisitorARM64::VisitVecUShr(HVecUShr* instr) {
HandleSimpleArithmeticSIMD(instr);
}
-void SchedulingLatencyVisitorARM64::VisitVecSetScalars(HVecSetScalars* instr) {
- HandleSimpleArithmeticSIMD(instr);
-}
-
void SchedulingLatencyVisitorARM64::VisitVecMultiplyAccumulate(
HVecMultiplyAccumulate* instr ATTRIBUTE_UNUSED) {
last_visited_latency_ = kArm64SIMDMulIntegerLatency;