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author | 2017-05-03 15:07:15 +0100 | |
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committer | 2017-06-06 14:09:02 +0100 | |
commit | f0fc4c6c9cedbd8665a2f98c4a649a62aaf3ac19 (patch) | |
tree | bd309a5d709f30e435fa98349954ee80330ea9f9 /compiler/optimizing/scheduler_arm.h | |
parent | cce39b5b4fc00ab9e6b4aaed1e7fa6928f0ec594 (diff) |
ARM64: SIMD instruction scheduling.
Enables scheduling for SIMD loops; the patch gives
4.1% perf gain on Linpack benchmark.
Test: test-art-target, test-art-host.
Change-Id: I5e728b5218fc6640ac583594ba08f69330b01e21
Diffstat (limited to 'compiler/optimizing/scheduler_arm.h')
-rw-r--r-- | compiler/optimizing/scheduler_arm.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/compiler/optimizing/scheduler_arm.h b/compiler/optimizing/scheduler_arm.h index 8d5e4f375b..9950bf3aea 100644 --- a/compiler/optimizing/scheduler_arm.h +++ b/compiler/optimizing/scheduler_arm.h @@ -99,6 +99,7 @@ class SchedulingLatencyVisitorARM : public SchedulingLatencyVisitor { M(BitwiseNegatedRight, unused) \ M(MultiplyAccumulate, unused) \ M(IntermediateAddress, unused) \ + M(IntermediateAddressIndex, unused) \ M(DataProcWithShifterOp, unused) #define DECLARE_VISIT_INSTRUCTION(type, unused) \ |