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author Roland Levillain <rpl@google.com> 2017-07-14 14:34:22 +0100
committer Roland Levillain <rpl@google.com> 2017-07-14 17:25:39 +0100
commit9983e302384c12a975c8d2d5ae239f79fd8e1996 (patch)
tree4e4d269fe1a3d4f0f1b93cd972adab9f17aab8e0 /compiler/optimizing/scheduler_arm.h
parentbac2bd1c2fbdd94f4d4dfe83d8451f655e875e36 (diff)
Remove the old ARM code generator from ART's Optimizing compiler.
The AArch32 VIXL-based code generator has been the default ARM code generator in ART for some time now. The old ARM code generator does not compile anymore; retiring it. Test: test.py Bug: 63316036 Change-Id: Iab8fbc4ac73eac2c1a809cd7b22fec6b619755db
Diffstat (limited to 'compiler/optimizing/scheduler_arm.h')
-rw-r--r--compiler/optimizing/scheduler_arm.h9
1 files changed, 1 insertions, 8 deletions
diff --git a/compiler/optimizing/scheduler_arm.h b/compiler/optimizing/scheduler_arm.h
index 897e97da49..a9f2295c35 100644
--- a/compiler/optimizing/scheduler_arm.h
+++ b/compiler/optimizing/scheduler_arm.h
@@ -17,20 +17,13 @@
#ifndef ART_COMPILER_OPTIMIZING_SCHEDULER_ARM_H_
#define ART_COMPILER_OPTIMIZING_SCHEDULER_ARM_H_
-#ifdef ART_USE_OLD_ARM_BACKEND
-#include "code_generator_arm.h"
-#else
#include "code_generator_arm_vixl.h"
-#endif
#include "scheduler.h"
namespace art {
namespace arm {
-#ifdef ART_USE_OLD_ARM_BACKEND
-typedef CodeGeneratorARM CodeGeneratorARMType;
-#else
+// TODO: Replace CodeGeneratorARMType with CodeGeneratorARMVIXL everywhere?
typedef CodeGeneratorARMVIXL CodeGeneratorARMType;
-#endif
// AArch32 instruction latencies.
// We currently assume that all ARM CPUs share the same instruction latency list.