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author Santiago Aboy Solanes <solanes@google.com> 2024-01-22 08:57:31 +0000
committer Santiago Aboy Solanes <solanes@google.com> 2024-01-22 10:49:24 +0000
commitb5b98b9bb31acb2deffb692c50d0fbc71476663b (patch)
tree3bda094f8d5ea90ad34e5d357889ce4933f657f5 /compiler/optimizing/scheduler_arm.cc
parentdbf9d9309f3df9c9ac8a9e30277b31ebb2977f4d (diff)
Revert^3 "Disable write-barrier elimination pass"
This reverts commit 9f8df195b7ff2ce47eec4e9b193ff3214ebed19c. Reason for revert: Fix for x86_64 with heap poison enabled This case uses a temp with index `1` in the regular FieldSet case. This is done like this due to GenerateVarHandleSet also calling HandleFieldSet. The bug was that we were allocating only one temp in the regular FieldSet case and therefore not having the temp with index `1` available. PS1 is the revert as-is. PS2 contains the fix. Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b Test: Same command with heap poison enabled too Bug: 301833859 Bug: 310755375 Bug: 260843353 Change-Id: Ie2740b4c443158c4e72810ce1d8268353c5f0055
Diffstat (limited to 'compiler/optimizing/scheduler_arm.cc')
-rw-r--r--compiler/optimizing/scheduler_arm.cc4
1 files changed, 1 insertions, 3 deletions
diff --git a/compiler/optimizing/scheduler_arm.cc b/compiler/optimizing/scheduler_arm.cc
index cafb0f5da6..510a0f5496 100644
--- a/compiler/optimizing/scheduler_arm.cc
+++ b/compiler/optimizing/scheduler_arm.cc
@@ -977,8 +977,6 @@ void SchedulingLatencyVisitorARM::HandleFieldSetLatencies(HInstruction* instruct
DCHECK(codegen_ != nullptr);
bool is_volatile = field_info.IsVolatile();
DataType::Type field_type = field_info.GetFieldType();
- bool needs_write_barrier =
- CodeGenerator::StoreNeedsWriteBarrier(field_type, instruction->InputAt(1));
bool atomic_ldrd_strd = codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd();
switch (field_type) {
@@ -997,7 +995,7 @@ void SchedulingLatencyVisitorARM::HandleFieldSetLatencies(HInstruction* instruct
case DataType::Type::kInt32:
case DataType::Type::kReference:
- if (kPoisonHeapReferences && needs_write_barrier) {
+ if (kPoisonHeapReferences && field_type == DataType::Type::kReference) {
last_visited_internal_latency_ += kArmIntegerOpLatency * 2;
}
last_visited_latency_ = kArmMemoryStoreLatency;