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author Santiago Aboy Solanes <solanes@google.com> 2024-01-22 15:03:42 +0000
committer Santiago Aboy Solanes <solanes@google.com> 2024-01-22 16:20:41 +0000
commit31b949bc4a76e5c6d00a8e18c346f123b5321a1c (patch)
treeb60da081b30899a7447c63ccad60cc4519de9d00 /compiler/optimizing/scheduler_arm.cc
parent689cca840843eeced3206da16e475856de953360 (diff)
Revert^4 "Disable write-barrier elimination pass"
This reverts commit b5b98b9bb31acb2deffb692c50d0fbc71476663b. Reason for revert: Breaks tests in arm64 + heap poison configurations Bug: 310755375 Bug: 260843353 Change-Id: I682c74987a365497e0dbe47eba26a9ccf0513561
Diffstat (limited to 'compiler/optimizing/scheduler_arm.cc')
-rw-r--r--compiler/optimizing/scheduler_arm.cc4
1 files changed, 3 insertions, 1 deletions
diff --git a/compiler/optimizing/scheduler_arm.cc b/compiler/optimizing/scheduler_arm.cc
index 510a0f5496..cafb0f5da6 100644
--- a/compiler/optimizing/scheduler_arm.cc
+++ b/compiler/optimizing/scheduler_arm.cc
@@ -977,6 +977,8 @@ void SchedulingLatencyVisitorARM::HandleFieldSetLatencies(HInstruction* instruct
DCHECK(codegen_ != nullptr);
bool is_volatile = field_info.IsVolatile();
DataType::Type field_type = field_info.GetFieldType();
+ bool needs_write_barrier =
+ CodeGenerator::StoreNeedsWriteBarrier(field_type, instruction->InputAt(1));
bool atomic_ldrd_strd = codegen_->GetInstructionSetFeatures().HasAtomicLdrdAndStrd();
switch (field_type) {
@@ -995,7 +997,7 @@ void SchedulingLatencyVisitorARM::HandleFieldSetLatencies(HInstruction* instruct
case DataType::Type::kInt32:
case DataType::Type::kReference:
- if (kPoisonHeapReferences && field_type == DataType::Type::kReference) {
+ if (kPoisonHeapReferences && needs_write_barrier) {
last_visited_internal_latency_ += kArmIntegerOpLatency * 2;
}
last_visited_latency_ = kArmMemoryStoreLatency;