diff options
author | 2024-03-22 10:45:15 +0000 | |
---|---|---|
committer | 2024-03-25 13:43:14 +0000 | |
commit | 56dcaeec46dd53e271d6f201d2028996bf19f9dd (patch) | |
tree | ea607494f1912d60e838be94919e25db2ec3ac89 /compiler/optimizing/register_allocator.cc | |
parent | 9c4a2b5bb3695349e31a00492731e578e8853a21 (diff) |
Remove extra uses of ClearAllBits
ArenaBitVector creation guarantees it starts empty. Add a debug
check to make sure this assumption doesn't change.
Note that ArenaAllocator guarantees zero-initialized memory but
ScopedArenaAllocators do not. This is fine either way since the
BitVector constructor calls ClearAllBits.
Bug: 329037671
Test: art/test/testrunner/testrunner.py --host --64 --optimizing -b
Change-Id: Icbf5e5dd1869e80b5d5828ecca9f13de30c0242b
Diffstat (limited to 'compiler/optimizing/register_allocator.cc')
-rw-r--r-- | compiler/optimizing/register_allocator.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/compiler/optimizing/register_allocator.cc b/compiler/optimizing/register_allocator.cc index 54a80555dc..1b3a9a6285 100644 --- a/compiler/optimizing/register_allocator.cc +++ b/compiler/optimizing/register_allocator.cc @@ -214,7 +214,6 @@ bool RegisterAllocator::ValidateIntervals(ArrayRef<LiveInterval* const> interval for (size_t i = 0; i < number_of_registers + number_of_spill_slots; ++i) { liveness_of_values.push_back( ArenaBitVector::Create(&allocator, max_end, false, kArenaAllocRegisterAllocatorValidate)); - liveness_of_values.back()->ClearAllBits(); } for (LiveInterval* start_interval : intervals) { |