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| author | 2018-10-26 15:03:53 +0530 | |
|---|---|---|
| committer | 2018-11-08 14:50:29 +0530 | |
| commit | dd121f637509a50d6744a0ad596f5dc627e0c60a (patch) | |
| tree | 1e20c636cd40a5a87cae1cd0d0b55940c8111a20 /compiler/optimizing/optimizing_compiler.cc | |
| parent | fe59955fc41e277bf1c60378202ba785abb1e4a8 (diff) | |
Emit bit manipulation instructions for x86 and x86_64
This patch performs instruction simplification to
generate instructions andn, blsmsk and blsr on
cpus that have avx2.
Test: test.py --host --64, test-art-host-gtest
Change-Id: Ie41a1b99ac2980f1e9f6a831a7d639bc3e248f0f
Signed-off-by: Shalini Salomi Bodapati <shalini.salomi.bodapati@intel.com>
Diffstat (limited to 'compiler/optimizing/optimizing_compiler.cc')
| -rw-r--r-- | compiler/optimizing/optimizing_compiler.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/compiler/optimizing/optimizing_compiler.cc b/compiler/optimizing/optimizing_compiler.cc index 4f495b6d81..c9c1194e5a 100644 --- a/compiler/optimizing/optimizing_compiler.cc +++ b/compiler/optimizing/optimizing_compiler.cc @@ -579,6 +579,7 @@ bool OptimizingCompiler::RunArchOptimizations(HGraph* graph, #ifdef ART_ENABLE_CODEGEN_x86 case InstructionSet::kX86: { OptimizationDef x86_optimizations[] = { + OptDef(OptimizationPass::kInstructionSimplifierX86), OptDef(OptimizationPass::kSideEffectsAnalysis), OptDef(OptimizationPass::kGlobalValueNumbering, "GVN$after_arch"), OptDef(OptimizationPass::kPcRelativeFixupsX86), @@ -595,6 +596,7 @@ bool OptimizingCompiler::RunArchOptimizations(HGraph* graph, #ifdef ART_ENABLE_CODEGEN_x86_64 case InstructionSet::kX86_64: { OptimizationDef x86_64_optimizations[] = { + OptDef(OptimizationPass::kInstructionSimplifierX86_64), OptDef(OptimizationPass::kSideEffectsAnalysis), OptDef(OptimizationPass::kGlobalValueNumbering, "GVN$after_arch"), OptDef(OptimizationPass::kX86MemoryOperandGeneration) |