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author Evgeny Astigeevich <evgeny.astigeevich@linaro.org> 2020-05-07 12:44:10 +0100
committer Evgeny Astigeevich <evgeny.astigeevich@linaro.org> 2020-05-12 10:35:49 +0100
commit968db3c09e5059e30044d69f1a5fd9bcd937392e (patch)
tree5496a327556b30ac2cd1877b515fa852688036bd /compiler/optimizing/nodes.h
parent2750a9884d7579f301c7ff65a6daaf8520af7902 (diff)
ARM64: Combine LSR+ASR into ASR for Int32 HDiv/HRem
HDiv/HRem having a constant divisor are optimized by using multiplication of the dividend by a sort of reciprocal of the divisor. The multiplication is done by multiplying 32-bit numbers into a 64-bit result. The high 32 bits of the result are used. In case of Int32 LSR is used to get those bits. After that there might be correction operations and ASR. When there are no correction operations between LSR and ASR they can be combined into one ASR. This CL implements this optimization. Improvements (Pixel 3): little core big core jit_aot/LoadCheck.RandomSumInvokeStaticMethod 7.1% 8.3% jit_aot/LoadCheck.RandomSumInvokeUserClass 4.6% 12.0% benchmarksgame/fasta 3.3% 1.0% benchmarksgame/fasta_4 2.4% 2.6% benchmarksgame/fastaredux 2.2% 2.2% SPECjvm2k8 MPEGAudio 1.7% 1.0% Test: test.py --host --optimizing --jit Test: test.py --target --optimizing --jit Change-Id: I5267b38d3a58319e24152917fabe836d5b346bce
Diffstat (limited to 'compiler/optimizing/nodes.h')
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