summaryrefslogtreecommitdiff
path: root/compiler/optimizing/instruction_simplifier_shared.h
diff options
context:
space:
mode:
author Anton Romanov <anton.romanov@syntacore.com> 2024-09-11 16:29:10 +0000
committer Treehugger Robot <android-test-infra-autosubmit@system.gserviceaccount.com> 2024-09-13 09:28:01 +0000
commitd0bc68e1f40259230329e6709c72af187f72144c (patch)
tree0fbe11c2b48441b1b40d598883611ece8148352d /compiler/optimizing/instruction_simplifier_shared.h
parentd0929a5662cf29440667e40fadcf839e5fb8aa45 (diff)
riscv64: Add node Rol, fix InstructionBuilder
This reverts commit 744830cb242c82c4637e6fb303b36d0371c84979. Reason for revert: updated CHECKer test to use rolw instead of rol. Change-Id: I50e34c6ac69488a9c083f04c6382df4302e8e7d3
Diffstat (limited to 'compiler/optimizing/instruction_simplifier_shared.h')
-rw-r--r--compiler/optimizing/instruction_simplifier_shared.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/compiler/optimizing/instruction_simplifier_shared.h b/compiler/optimizing/instruction_simplifier_shared.h
index de70ec5a8a..8e61109b0e 100644
--- a/compiler/optimizing/instruction_simplifier_shared.h
+++ b/compiler/optimizing/instruction_simplifier_shared.h
@@ -77,6 +77,14 @@ bool TryExtractVecArrayAccessAddress(HVecMemoryOperation* access, HInstruction*
// Add(c, Sub(b, a))
bool TryReplaceSubSubWithSubAdd(HSub* last_sub);
+// ARM does not contain instruction ROL so replace
+// ROL dest, a, distance
+// with
+// NEG neg, distance
+// ROR dest, a, neg
+// before GVN to give it a chance to deduplicate the instructions, if it's able.
+void UnfoldRotateLeft(HRol* rol);
+
} // namespace art
#endif // ART_COMPILER_OPTIMIZING_INSTRUCTION_SIMPLIFIER_SHARED_H_