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author | 2024-02-29 16:09:29 +0000 | |
---|---|---|
committer | 2024-03-06 08:22:54 +0000 | |
commit | 04a110dadb8088eaac2c5ac014327c6335c2b8dd (patch) | |
tree | 0c8b8cdea2f7bdfe922fb7dc9bd979fb612cdea7 /compiler/optimizing/instruction_simplifier_arm.cc | |
parent | 9fa9678fa177ff480a1e5e509757d498bf7bf555 (diff) |
Convert And+Sub into bic if possible
Convert
i1: AND a, b
SUB a, i1
into:
BIC a, a, b
Also works if `i1` is AND b, a.
Bug: 304972513
Fixes: 304972513
Test: art/test/testrunner/testrunner.py --host --64 --target
Change-Id: I22218c263f52b58d87431186588ac166dc93246a
Diffstat (limited to 'compiler/optimizing/instruction_simplifier_arm.cc')
-rw-r--r-- | compiler/optimizing/instruction_simplifier_arm.cc | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/compiler/optimizing/instruction_simplifier_arm.cc b/compiler/optimizing/instruction_simplifier_arm.cc index be4371f734..aefa27628b 100644 --- a/compiler/optimizing/instruction_simplifier_arm.cc +++ b/compiler/optimizing/instruction_simplifier_arm.cc @@ -278,9 +278,15 @@ void InstructionSimplifierArmVisitor::VisitSub(HSub* instruction) { if (IsSubRightSubLeftShl(instruction)) { HInstruction* shl = instruction->GetRight()->InputAt(0); if (shl->InputAt(1)->IsConstant() && TryReplaceSubSubWithSubAdd(instruction)) { - TryMergeIntoUsersShifterOperand(shl); + if (TryMergeIntoUsersShifterOperand(shl)) { + return; + } } } + + if (TryMergeWithAnd(instruction)) { + return; + } } void InstructionSimplifierArmVisitor::VisitTypeConversion(HTypeConversion* instruction) { |