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| author | 2023-11-30 09:47:03 +0000 | |
|---|---|---|
| committer | 2023-12-01 07:33:24 +0000 | |
| commit | ee12ff26f3413dee84c963af15dd1018b58466bb (patch) | |
| tree | 61212c0cf6b2f3e389b8eae99cc421158b9fcb73 /compiler/optimizing/induction_var_range.cc | |
| parent | 502d277b38adb65d65ec9c88e8d5317303dc4035 (diff) | |
riscv64: Fix VarHandle GetAndUpdate intrinsic.
Fix the byte-swap CAS case for narrow types (short, char).
Note that these cases are not currently supported by libcore
and we therefore take the slow path during the access mode
check. However, the ART VarHandle implementation is ready to
handle them in case this arbitrary libcore (or upstream?)
decision changes and it generates code for them. This fix
avoids a `DCHECK` failure in `GenerateByteSwapAndExtract()`
by doing the `DCHECK` in two of its three callers and
generates the correct (and smaller) code in all cases.
Extend the run-test 712 to test offsets that would lead to
non-zero shift in `GenerateByteSwapAndExtract()`. To test
this code path, one needs to modify the libcore method
`VarHandle.unalignedAccessModesBitMask()` to permit the
`NUMERIC_ATOMIC_UPDATE_ACCESS_MODES_BIT_MASK` for `short`
(and maybe `char` but that makes less sense than `short`).
Test: testrunner.py --target --64 --ndebug --optimizing
Bug: 283082089
Change-Id: I23926bbafc9eff21e094b00f36357d629cc550a9
Diffstat (limited to 'compiler/optimizing/induction_var_range.cc')
0 files changed, 0 insertions, 0 deletions