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author Ulya Trafimovich <skvadrik@google.com> 2023-02-14 10:35:57 +0000
committer Ulya Trofimovich <skvadrik@google.com> 2023-02-23 10:50:16 +0000
commit20b1e6ff1d102eb093824a8c10345b0e4c8bebc6 (patch)
tree726c6d5d3e9d48bc1e53e0737398d339ce538fae /compiler/optimizing/code_sinking.cc
parent468c19b44bf86699869e0776b46c694fccd894d5 (diff)
riscv64: exclude S2 from callee-saved registers, reduce frame size.
S2 is a callee-saved GPR by the RISC-V calling convention, but it's used for shadow stack by the compiler/bionic (https://r.android.com/2427910). This may change later if RISC-V gets hardware support for shadow stack, but at the moment S2 should be treated as yet another unallocatable platform-specific GPR like TP and GP. Removing S2 from callee-saved stack frames allows us to reduce frame size by 16 bytes (the other 8 bytes come from padding, as the stack frames are 16-bytes aligned). Bug: https://github.com/google/android-riscv64/issues/55 Test: lunch aosp_riscv64-userdebug \ && art/tools/buildbot-build.sh --target Change-Id: I727d2e8faac01fb0e8c96ee7494a8a5ef486f685
Diffstat (limited to 'compiler/optimizing/code_sinking.cc')
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