Support callee save floating point registers on x64.

- Share the computation of core_spill_mask and fpu_spill_mask
  between backends.
- Remove explicit stack overflow check support: we need to adjust
  them and since they are not tested, they will easily bitrot.

Change-Id: I0b619b8de4e1bdb169ea1ae7c6ede8df0d65837a

1 files changed, 3 insertions, 0 deletions

diff --git a/compiler/optimizing/code_generator.cc b/compiler/optimizing/code_generator.cc
index 0af70f9b90..43fd8bb668 100644
--- a/compiler/optimizing/code_generator.cc
+++ b/compiler/optimizing/code_generator.cc
@@ -140,6 +140,9 @@ void CodeGenerator::ComputeFrameSize(size_t number_of_spill_slots,
                                      size_t maximum_number_of_live_core_registers,
                                      size_t maximum_number_of_live_fp_registers,
                                      size_t number_of_out_slots) {
+  core_spill_mask_ = allocated_registers_.GetCoreRegisters() & core_callee_save_mask_;
+  DCHECK_NE(core_spill_mask_, 0u) << "At least the return address register must be saved";
+  fpu_spill_mask_ = allocated_registers_.GetFloatingPointRegisters() & fpu_callee_save_mask_;
   first_register_slot_in_slow_path_ = (number_of_out_slots + number_of_spill_slots) * kVRegSize;
 
   SetFrameSize(RoundUp(