diff options
| author | 2015-01-26 10:10:46 +0000 | |
|---|---|---|
| committer | 2015-01-26 10:10:47 +0000 | |
| commit | 2dadc9df0ffb822870a150f81257792b83241c77 (patch) | |
| tree | ee8650cc14ec18ce0d7abf089c7d2e0dfc9e079d /compiler/optimizing/code_generator.cc | |
| parent | 336247fa6deba2948f5ede1df806f48cf67c790a (diff) | |
| parent | 4dee636d21d9ce54386cdfbb824e5eb2a9c1af0d (diff) | |
Merge "Support callee-save registers on ARM."
Diffstat (limited to 'compiler/optimizing/code_generator.cc')
| -rw-r--r-- | compiler/optimizing/code_generator.cc | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/compiler/optimizing/code_generator.cc b/compiler/optimizing/code_generator.cc index 43fd8bb668..0a405c4bbe 100644 --- a/compiler/optimizing/code_generator.cc +++ b/compiler/optimizing/code_generator.cc @@ -140,9 +140,7 @@ void CodeGenerator::ComputeFrameSize(size_t number_of_spill_slots, size_t maximum_number_of_live_core_registers, size_t maximum_number_of_live_fp_registers, size_t number_of_out_slots) { - core_spill_mask_ = allocated_registers_.GetCoreRegisters() & core_callee_save_mask_; - DCHECK_NE(core_spill_mask_, 0u) << "At least the return address register must be saved"; - fpu_spill_mask_ = allocated_registers_.GetFloatingPointRegisters() & fpu_callee_save_mask_; + ComputeSpillMask(); first_register_slot_in_slow_path_ = (number_of_out_slots + number_of_spill_slots) * kVRegSize; SetFrameSize(RoundUp( |