diff options
author | 2014-05-29 16:03:42 -0700 | |
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committer | 2014-05-29 16:03:42 -0700 | |
commit | d9f4c52071b305b777c7d7d08176b19882b393d8 (patch) | |
tree | cfcac57c46ddb9be20711909f66342614fc7a6f6 /compiler/dex/quick/ralloc_util.cc | |
parent | 31e7fcb904f03a504f082d25814ac4644b5073e4 (diff) |
Quick compiler: x86_64 workaround
A recent CL changed the allocation of temp registers destined to
hold a reference such that on 64-bit systems a 64-bit register
would be allocated. However, for bring-up purposes, the x86_64
backend wants the ability to continue holding long values in a
register pair.
Change-Id: I25d9f755fafbe96144226677f85c6d5cad1ffa76
Diffstat (limited to 'compiler/dex/quick/ralloc_util.cc')
-rw-r--r-- | compiler/dex/quick/ralloc_util.cc | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/compiler/dex/quick/ralloc_util.cc b/compiler/dex/quick/ralloc_util.cc index 59ae16ed36..058b89c499 100644 --- a/compiler/dex/quick/ralloc_util.cc +++ b/compiler/dex/quick/ralloc_util.cc @@ -407,7 +407,16 @@ RegStorage Mir2Lir::AllocTempWide() { } RegStorage Mir2Lir::AllocTempWord() { - return (Is64BitInstructionSet(cu_->instruction_set)) ? AllocTempWide() : AllocTemp(); + // FIXME: temporary workaround. For bring-up purposes, x86_64 needs the ability + // to allocate wide values as a pair of core registers. However, we can't hold + // a reference in a register pair. This workaround will be removed when the + // reference handling code is reworked, or x86_64 backend starts using wide core + // registers - whichever happens first. + if (cu_->instruction_set == kX86_64) { + return AllocTemp(); + } else { + return (Is64BitInstructionSet(cu_->instruction_set)) ? AllocTempWide() : AllocTemp(); + } } RegStorage Mir2Lir::AllocTempSingle() { |