diff options
| author | 2014-07-01 17:43:41 -0700 | |
|---|---|---|
| committer | 2014-07-03 14:44:01 -0700 | |
| commit | a77ee5103532abb197f492c14a9e6fb437054e2a (patch) | |
| tree | b8758c0d0a0ecd2f902a53a0fbb1b5014a153c6f /compiler/dex/quick/ralloc_util.cc | |
| parent | 3ee86bcbbc29f17b0243954a52dcda96b09411e0 (diff) | |
x86_64: TargetReg update for x86
Also includes changes in common code. Elimination of use of TargetReg
with one parameter and direct access to special target registers.
Change-Id: Ied2c1f87d4d1e4345248afe74bca40487a46a371
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Diffstat (limited to 'compiler/dex/quick/ralloc_util.cc')
| -rw-r--r-- | compiler/dex/quick/ralloc_util.cc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/compiler/dex/quick/ralloc_util.cc b/compiler/dex/quick/ralloc_util.cc index 6bedae868c..13bd4432d7 100644 --- a/compiler/dex/quick/ralloc_util.cc +++ b/compiler/dex/quick/ralloc_util.cc @@ -757,7 +757,7 @@ void Mir2Lir::FlushRegWide(RegStorage reg) { } int v_reg = mir_graph_->SRegToVReg(info1->SReg()); ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); - StoreBaseDisp(TargetReg(kSp), VRegOffset(v_reg), reg, k64, kNotVolatile); + StoreBaseDisp(TargetPtrReg(kSp), VRegOffset(v_reg), reg, k64, kNotVolatile); } } else { RegisterInfo* info = GetRegInfo(reg); @@ -765,7 +765,7 @@ void Mir2Lir::FlushRegWide(RegStorage reg) { info->SetIsDirty(false); int v_reg = mir_graph_->SRegToVReg(info->SReg()); ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); - StoreBaseDisp(TargetReg(kSp), VRegOffset(v_reg), reg, k64, kNotVolatile); + StoreBaseDisp(TargetPtrReg(kSp), VRegOffset(v_reg), reg, k64, kNotVolatile); } } } @@ -777,7 +777,7 @@ void Mir2Lir::FlushReg(RegStorage reg) { info->SetIsDirty(false); int v_reg = mir_graph_->SRegToVReg(info->SReg()); ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); - StoreBaseDisp(TargetReg(kSp), VRegOffset(v_reg), reg, kWord, kNotVolatile); + StoreBaseDisp(TargetPtrReg(kSp), VRegOffset(v_reg), reg, kWord, kNotVolatile); } } @@ -1313,7 +1313,7 @@ void Mir2Lir::DoPromotion() { RegLocation *curr = &mir_graph_->reg_location_[i]; int p_map_idx = SRegToPMap(curr->s_reg_low); int reg_num = curr->fp ? promotion_map_[p_map_idx].fp_reg : promotion_map_[p_map_idx].core_reg; - bool wide = curr->wide || (cu_->target64 && curr->ref && cu_->instruction_set != kX86_64); + bool wide = curr->wide || (cu_->target64 && curr->ref); RegStorage reg = RegStorage::InvalidReg(); if (curr->fp && promotion_map_[p_map_idx].fp_location == kLocPhysReg) { if (wide && cu_->instruction_set == kThumb2) { |