summaryrefslogtreecommitdiff
path: root/compiler/dex/quick/ralloc_util.cc
diff options
context:
space:
mode:
author buzbee <buzbee@google.com> 2014-03-27 11:22:43 -0700
committer buzbee <buzbee@google.com> 2014-03-27 12:10:00 -0700
commit262b299abf658c16f61dad2240cfaf3deafe4423 (patch)
tree67cd5f957999ceade0fd73d8231c5528c7fd2dbe /compiler/dex/quick/ralloc_util.cc
parent2aa9b36e316a5b2e29c80a745152c07ccda0d83f (diff)
Fix x86 master build failure.
Replace bogus DCHECKs with logic matching pre-cleanup code. Register pairs are considered temp, promoted, dirty or live if either register of the pair meets criteria. Change-Id: If2df891fdd1e3351d4cbe72aaf2a2ac5b34b2110
Diffstat (limited to 'compiler/dex/quick/ralloc_util.cc')
-rw-r--r--compiler/dex/quick/ralloc_util.cc18
1 files changed, 7 insertions, 11 deletions
diff --git a/compiler/dex/quick/ralloc_util.cc b/compiler/dex/quick/ralloc_util.cc
index 3c49756e0e..137d5eb61e 100644
--- a/compiler/dex/quick/ralloc_util.cc
+++ b/compiler/dex/quick/ralloc_util.cc
@@ -431,10 +431,9 @@ Mir2Lir::RegisterInfo* Mir2Lir::IsLive(int reg) {
return p->live ? p : NULL;
}
-Mir2Lir::RegisterInfo* Mir2Lir::IsLive(RegStorage reg) {
+bool Mir2Lir::IsLive(RegStorage reg) {
if (reg.IsPair()) {
- DCHECK_EQ(IsLive(reg.GetLowReg()) == nullptr, IsLive(reg.GetHighReg()) == nullptr);
- return IsLive(reg.GetLowReg());
+ return IsLive(reg.GetLowReg()) || IsLive(reg.GetHighReg());
} else {
return IsLive(reg.GetReg());
}
@@ -445,10 +444,9 @@ Mir2Lir::RegisterInfo* Mir2Lir::IsTemp(int reg) {
return (p->is_temp) ? p : NULL;
}
-Mir2Lir::RegisterInfo* Mir2Lir::IsTemp(RegStorage reg) {
+bool Mir2Lir::IsTemp(RegStorage reg) {
if (reg.IsPair()) {
- DCHECK_EQ(IsTemp(reg.GetLowReg()) == nullptr, IsTemp(reg.GetHighReg()) == nullptr);
- return IsTemp(reg.GetLowReg());
+ return IsTemp(reg.GetLowReg()) || IsTemp(reg.GetHighReg());
} else {
return IsTemp(reg.GetReg());
}
@@ -459,10 +457,9 @@ Mir2Lir::RegisterInfo* Mir2Lir::IsPromoted(int reg) {
return (p->is_temp) ? NULL : p;
}
-Mir2Lir::RegisterInfo* Mir2Lir::IsPromoted(RegStorage reg) {
+bool Mir2Lir::IsPromoted(RegStorage reg) {
if (reg.IsPair()) {
- DCHECK_EQ(IsPromoted(reg.GetLowReg()) == nullptr, IsPromoted(reg.GetHighReg()) == nullptr);
- return IsPromoted(reg.GetLowReg());
+ return IsPromoted(reg.GetLowReg()) || IsPromoted(reg.GetHighReg());
} else {
return IsPromoted(reg.GetReg());
}
@@ -475,8 +472,7 @@ bool Mir2Lir::IsDirty(int reg) {
bool Mir2Lir::IsDirty(RegStorage reg) {
if (reg.IsPair()) {
- DCHECK_EQ(IsDirty(reg.GetLowReg()), IsDirty(reg.GetHighReg()));
- return IsDirty(reg.GetLowReg());
+ return IsDirty(reg.GetLowReg()) || IsDirty(reg.GetHighReg());
} else {
return IsDirty(reg.GetReg());
}