diff options
| author | 2014-04-29 16:55:20 -0400 | |
|---|---|---|
| committer | 2014-05-16 11:04:27 -0700 | |
| commit | d65c51a556e6649db4e18bd083c8fec37607a442 (patch) | |
| tree | 97fcb17ae74a587c6ef756dda6f4b03db5e9950f /compiler/dex/quick/codegen_util.cc | |
| parent | 1e97c4a4ab9f17d1394b952882d59d894b1e3c74 (diff) | |
ART: Add support for constant vector literals
Add in some vector instructions. Implement the ConstVector
instruction, which takes 4 words of data and loads it into
an XMM register.
Initially, only the ConstVector MIR opcode is implemented. Others will
be added after this one goes in.
Change-Id: I5c79bc8b7de9030ef1c213fc8b227debc47f6337
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Diffstat (limited to 'compiler/dex/quick/codegen_util.cc')
| -rw-r--r-- | compiler/dex/quick/codegen_util.cc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/compiler/dex/quick/codegen_util.cc b/compiler/dex/quick/codegen_util.cc index 784dfaf96a..6f812384e4 100644 --- a/compiler/dex/quick/codegen_util.cc +++ b/compiler/dex/quick/codegen_util.cc @@ -1203,4 +1203,8 @@ RegLocation Mir2Lir::NarrowRegLoc(RegLocation loc) { return loc; } +void Mir2Lir::GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) { + LOG(FATAL) << "Unknown MIR opcode not supported on this architecture"; +} + } // namespace art |