diff options
| author | 2015-06-23 11:00:19 +0000 | |
|---|---|---|
| committer | 2015-06-23 11:00:19 +0000 | |
| commit | 87dc1b09cee6e972fbe3ad48ba8b5ae68d37085f (patch) | |
| tree | e266a61a68204d6f60a214267719e18b797f2ec2 /compiler/dex/quick/codegen_util.cc | |
| parent | b5061a821d96cb1af7ba24d21a4d2d59f7f16c7c (diff) | |
| parent | 41f9cc28f2c9edd3903ba6ca1c75b022445552ad (diff) | |
Merge "ART: Compiler generated GC map should take care of temp registers."
Diffstat (limited to 'compiler/dex/quick/codegen_util.cc')
| -rw-r--r-- | compiler/dex/quick/codegen_util.cc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/compiler/dex/quick/codegen_util.cc b/compiler/dex/quick/codegen_util.cc index c803e6588c..8629f39702 100644 --- a/compiler/dex/quick/codegen_util.cc +++ b/compiler/dex/quick/codegen_util.cc @@ -1370,7 +1370,9 @@ void Mir2Lir::InitReferenceVRegs(BasicBlock* bb, BitVector* references) { DCHECK(first_bb->data_flow_info->vreg_to_ssa_map_exit != nullptr); const int32_t* first_vreg_to_ssa_map = first_bb->data_flow_info->vreg_to_ssa_map_exit; references->ClearAllBits(); - for (uint32_t vreg = 0, num_vregs = mir_graph_->GetNumOfCodeVRs(); vreg != num_vregs; ++vreg) { + for (uint32_t vreg = 0, + num_vregs = mir_graph_->GetNumOfCodeVRs() + mir_graph_->GetNumUsedCompilerTemps(); + vreg != num_vregs; ++vreg) { int32_t sreg = first_vreg_to_ssa_map[vreg]; if (sreg != INVALID_SREG && mir_graph_->reg_location_[sreg].ref && !mir_graph_->IsConstantNullRef(mir_graph_->reg_location_[sreg])) { |