Quick compiler: debugging assists

A few minor assists to ease A/B debugging in the Quick
compiler:
   1.  To save time, the assemblers for some targets only
update the object code offsets on instructions involved with
pc-relative fixups.  We add code to fix up all offsets when
doing a verbose codegen listing.
   2.  Temp registers are normally allocated in a round-robin
fashion.  When disabling liveness tracking, we now reset the
round-robin pool to 0 on each instruction boundary.  This makes
it easier to spot real codegen differences.
   3.  Self-register copies were previously emitted, but
marked as nops.  Minor change to avoid generating them in the
first place and reduce clutter.

Change-Id: I7954bba3b9f16ee690d663be510eac7034c93723

1 files changed, 14 insertions, 0 deletions

diff --git a/compiler/dex/quick/codegen_util.cc b/compiler/dex/quick/codegen_util.cc
index 677ee15462..501e4e204b 100644
--- a/compiler/dex/quick/codegen_util.cc
+++ b/compiler/dex/quick/codegen_util.cc
@@ -274,6 +274,19 @@ void Mir2Lir::DumpPromotionMap() {
   }
 }
 
+void Mir2Lir::UpdateLIROffsets() {
+  // Only used for code listings.
+  size_t offset = 0;
+  for (LIR* lir = first_lir_insn_; lir != nullptr; lir = lir->next) {
+    lir->offset = offset;
+    if (!lir->flags.is_nop && !IsPseudoLirOp(lir->opcode)) {
+      offset += GetInsnSize(lir);
+    } else if (lir->opcode == kPseudoPseudoAlign4) {
+      offset += (offset & 0x2);
+    }
+  }
+}
+
 /* Dump instructions and constant pool contents */
 void Mir2Lir::CodegenDump() {
   LOG(INFO) << "Dumping LIR insns for "
@@ -293,6 +306,7 @@ void Mir2Lir::CodegenDump() {
   LOG(INFO) << "expansion factor: "
             << static_cast<float>(total_size_) / static_cast<float>(insns_size * 2);
   DumpPromotionMap();
+  UpdateLIROffsets();
   for (lir_insn = first_lir_insn_; lir_insn != NULL; lir_insn = lir_insn->next) {
     DumpLIRInsn(lir_insn, 0);
   }