diff options
| author | 2014-07-01 22:24:22 +0000 | |
|---|---|---|
| committer | 2014-07-01 16:37:02 +0000 | |
| commit | 6f9dbb8d4aa72c9b24ea45358751123b6e4c7488 (patch) | |
| tree | 3211dce030f2c60542777a267222ee5b56cab5b5 /compiler/dex/quick/codegen_util.cc | |
| parent | e03e5a3c90565155e04e4a877f6353d83c9e888d (diff) | |
| parent | 4b537a851b686402513a7c4a4e60f5457bb8d7c1 (diff) | |
Merge "ART: Quick compiler: More size checks, add TargetReg variants"
Diffstat (limited to 'compiler/dex/quick/codegen_util.cc')
| -rw-r--r-- | compiler/dex/quick/codegen_util.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/compiler/dex/quick/codegen_util.cc b/compiler/dex/quick/codegen_util.cc index f31b670164..e571b3a407 100644 --- a/compiler/dex/quick/codegen_util.cc +++ b/compiler/dex/quick/codegen_util.cc @@ -1184,7 +1184,7 @@ void Mir2Lir::LoadCodeAddress(const MethodReference& target_method, InvokeType t // resolve these invokes to the same method, so we don't care which one we record here. data_target->operands[2] = type; } - LIR* load_pc_rel = OpPcRelLoad(TargetReg(symbolic_reg), data_target); + LIR* load_pc_rel = OpPcRelLoad(TargetRefReg(symbolic_reg), data_target); AppendLIR(load_pc_rel); DCHECK_NE(cu_->instruction_set, kMips) << reinterpret_cast<void*>(data_target); } @@ -1200,7 +1200,7 @@ void Mir2Lir::LoadMethodAddress(const MethodReference& target_method, InvokeType // resolve these invokes to the same method, so we don't care which one we record here. data_target->operands[2] = type; } - LIR* load_pc_rel = OpPcRelLoad(TargetReg(symbolic_reg), data_target); + LIR* load_pc_rel = OpPcRelLoad(TargetRefReg(symbolic_reg), data_target); AppendLIR(load_pc_rel); DCHECK_NE(cu_->instruction_set, kMips) << reinterpret_cast<void*>(data_target); } |