diff options
| author | 2014-03-27 03:22:33 +0000 | |
|---|---|---|
| committer | 2014-03-27 03:22:33 +0000 | |
| commit | 636583c586b78e188168e510452cef0645578f8d (patch) | |
| tree | 9e5842ac6f1b8d4d0c0f92ed77a4acc503e98a40 /compiler/dex/quick/codegen_util.cc | |
| parent | 12442d35d9dd5a31ef1340b49adbe56f70f1d797 (diff) | |
| parent | 2700f7e1edbcd2518f4978e4cd0e05a4149f91b6 (diff) | |
Merge "Continuing register cleanup"
Diffstat (limited to 'compiler/dex/quick/codegen_util.cc')
| -rw-r--r-- | compiler/dex/quick/codegen_util.cc | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/compiler/dex/quick/codegen_util.cc b/compiler/dex/quick/codegen_util.cc index 60f879685d..717ad86a75 100644 --- a/compiler/dex/quick/codegen_util.cc +++ b/compiler/dex/quick/codegen_util.cc @@ -1113,7 +1113,7 @@ bool Mir2Lir::BadOverlap(RegLocation rl_src, RegLocation rl_dest) { return (abs(mir_graph_->SRegToVReg(rl_src.s_reg_low) - mir_graph_->SRegToVReg(rl_dest.s_reg_low)) == 1); } -LIR *Mir2Lir::OpCmpMemImmBranch(ConditionCode cond, int temp_reg, int base_reg, +LIR *Mir2Lir::OpCmpMemImmBranch(ConditionCode cond, RegStorage temp_reg, RegStorage base_reg, int offset, int check_value, LIR* target) { // Handle this for architectures that can't compare to memory. LoadWordDisp(base_reg, offset, temp_reg); @@ -1168,4 +1168,12 @@ std::vector<uint8_t>* Mir2Lir::ReturnCallFrameInformation() { return nullptr; } +RegLocation Mir2Lir::NarrowRegLoc(RegLocation loc) { + loc.wide = false; + if (loc.reg.IsPair()) { + loc.reg = loc.reg.GetLow(); + } + return loc; +} + } // namespace art |