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author Bill Buzbee <buzbee@android.com> 2014-10-09 17:37:21 +0000
committer Gerrit Code Review <noreply-gerritcodereview@google.com> 2014-10-09 17:37:21 +0000
commit4ecaf87a2b62f4e51ee4c1f8b32aaea1473187a2 (patch)
tree4aee925ed0589a2bc7b886d3c81d234c2fe94093 /compiler/dex/quick/codegen_util.cc
parenta1d1fc2bed0d11a380bc9bdad5f7f3c69d75bd6d (diff)
parentd8c3e3608a7b47e82186e4f8118541ef06d9eab2 (diff)
Merge "ART: X86: GenLongArith should handle overlapped VRs"
Diffstat (limited to 'compiler/dex/quick/codegen_util.cc')
-rw-r--r--compiler/dex/quick/codegen_util.cc8
1 files changed, 7 insertions, 1 deletions
diff --git a/compiler/dex/quick/codegen_util.cc b/compiler/dex/quick/codegen_util.cc
index e18116ec3c..80a1ac4c52 100644
--- a/compiler/dex/quick/codegen_util.cc
+++ b/compiler/dex/quick/codegen_util.cc
@@ -1185,12 +1185,18 @@ int32_t Mir2Lir::LowestSetBit(uint64_t x) {
return bit_posn;
}
-bool Mir2Lir::BadOverlap(RegLocation rl_src, RegLocation rl_dest) {
+bool Mir2Lir::PartiallyIntersects(RegLocation rl_src, RegLocation rl_dest) {
DCHECK(rl_src.wide);
DCHECK(rl_dest.wide);
return (abs(mir_graph_->SRegToVReg(rl_src.s_reg_low) - mir_graph_->SRegToVReg(rl_dest.s_reg_low)) == 1);
}
+bool Mir2Lir::Intersects(RegLocation rl_src, RegLocation rl_dest) {
+ DCHECK(rl_src.wide);
+ DCHECK(rl_dest.wide);
+ return (abs(mir_graph_->SRegToVReg(rl_src.s_reg_low) - mir_graph_->SRegToVReg(rl_dest.s_reg_low)) <= 1);
+}
+
LIR *Mir2Lir::OpCmpMemImmBranch(ConditionCode cond, RegStorage temp_reg, RegStorage base_reg,
int offset, int check_value, LIR* target, LIR** compare) {
// Handle this for architectures that can't compare to memory.