diff options
| author | 2014-05-05 22:28:55 -0400 | |
|---|---|---|
| committer | 2014-05-06 07:18:03 -0400 | |
| commit | 0add77a86599260aba3ea4b56e9db3da6bb881a8 (patch) | |
| tree | df2129b88907d4f9739ab93907f2e10803fdd80b /compiler/dex/mir_optimization.cc | |
| parent | 66762055847a40fe4454782826d2bb7a4ea9e316 (diff) | |
ART: Ensure use counts updated when adding SSA reg
Ensure that matching data structures are updated when adding SSA
registers late in the compile.
Change-Id: I8e664dddf52c1a9095ba5b7a8df84e5a733bbc43
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Diffstat (limited to 'compiler/dex/mir_optimization.cc')
| -rw-r--r-- | compiler/dex/mir_optimization.cc | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/compiler/dex/mir_optimization.cc b/compiler/dex/mir_optimization.cc index 5c1bdf4c40..5cc994f692 100644 --- a/compiler/dex/mir_optimization.cc +++ b/compiler/dex/mir_optimization.cc @@ -286,10 +286,6 @@ CompilerTemp* MIRGraph::GetNewCompilerTemp(CompilerTempType ct_type, bool wide) reg_location_[ssa_reg_high].high_word = 1; reg_location_[ssa_reg_high].s_reg_low = ssa_reg_low; reg_location_[ssa_reg_high].wide = true; - - // A new SSA needs new use counts. - use_counts_.Insert(0); - raw_use_counts_.Insert(0); } num_non_special_compiler_temps_++; @@ -302,10 +298,6 @@ CompilerTemp* MIRGraph::GetNewCompilerTemp(CompilerTempType ct_type, bool wide) reg_location_[ssa_reg_low] = temp_loc; reg_location_[ssa_reg_low].s_reg_low = ssa_reg_low; reg_location_[ssa_reg_low].wide = wide; - - // A new SSA needs new use counts. - use_counts_.Insert(0); - raw_use_counts_.Insert(0); } compiler_temps_.Insert(compiler_temp); |