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| author | 2024-05-24 17:06:14 +0300 | |
|---|---|---|
| committer | 2024-08-13 08:12:08 +0000 | |
| commit | 7496a81f4298257a5c6ce25271873b0c12e69f96 (patch) | |
| tree | 9221b1e2b39ab35bdd4ab3de00a8badcac141ce7 /compiler/compiler_reflection_test.cc | |
| parent | 3e75615ad25b6af1842b194e78b429b0f585b46a (diff) | |
Implement transform from signed to unsigned compare
Support unsigned comparison in HCompare IR node
Implement instruction simplifier pass
Implement code generation of HCompare node for all
supported CPU targets
Performance gain on RISC-V:
Integer.compareUnsigned: +7.17%
Long.compareUnsigned: +7.17%
Add test cases to check simplification from HCompare to HCondition
Test: testrunner.py --target --64 --ndebug --optimizing
Change-Id: I591016e9aa4d094dc5e6f8b0128ac91f842cf25e
Diffstat (limited to 'compiler/compiler_reflection_test.cc')
0 files changed, 0 insertions, 0 deletions