Consolidate SIMD tests.

Test: testrunner.py --host --optimizing -t 640
Test: testrunner.py --target --optimizing -t 640
Change-Id: Ia23f300a75d5357784c0c70f8df6a7be2d690f9d

23 files changed, 192 insertions, 171 deletions

diff --git a/test/640-checker-byte-simd/expected.txt b/test/640-checker-byte-simd/expected.txt
deleted file mode 100644
index b0aad4deb5..0000000000
--- a/test/640-checker-byte-simd/expected.txt
+++ /dev/null
@@ -1 +0,0 @@
-passed
diff --git a/test/640-checker-char-simd/expected.txt b/test/640-checker-char-simd/expected.txt
deleted file mode 100644
index b0aad4deb5..0000000000
--- a/test/640-checker-char-simd/expected.txt
+++ /dev/null
@@ -1 +0,0 @@
-passed
diff --git a/test/640-checker-char-simd/info.txt b/test/640-checker-char-simd/info.txt
deleted file mode 100644
index c9c6d5ed9f..0000000000
--- a/test/640-checker-char-simd/info.txt
+++ /dev/null
@@ -1 +0,0 @@
-Functional tests on SIMD vectorization.
diff --git a/test/640-checker-double-simd/expected.txt b/test/640-checker-double-simd/expected.txt
deleted file mode 100644
index b0aad4deb5..0000000000
--- a/test/640-checker-double-simd/expected.txt
+++ /dev/null
@@ -1 +0,0 @@
-passed
diff --git a/test/640-checker-double-simd/info.txt b/test/640-checker-double-simd/info.txt
deleted file mode 100644
index c9c6d5ed9f..0000000000
--- a/test/640-checker-double-simd/info.txt
+++ /dev/null
@@ -1 +0,0 @@
-Functional tests on SIMD vectorization.
diff --git a/test/640-checker-float-simd/expected.txt b/test/640-checker-float-simd/expected.txt
deleted file mode 100644
index b0aad4deb5..0000000000
--- a/test/640-checker-float-simd/expected.txt
+++ /dev/null
@@ -1 +0,0 @@
-passed
diff --git a/test/640-checker-float-simd/info.txt b/test/640-checker-float-simd/info.txt
deleted file mode 100644
index c9c6d5ed9f..0000000000
--- a/test/640-checker-float-simd/info.txt
+++ /dev/null
@@ -1 +0,0 @@
-Functional tests on SIMD vectorization.
diff --git a/test/640-checker-int-simd/expected.txt b/test/640-checker-int-simd/expected.txt
deleted file mode 100644
index b0aad4deb5..0000000000
--- a/test/640-checker-int-simd/expected.txt
+++ /dev/null
@@ -1 +0,0 @@
-passed
diff --git a/test/640-checker-int-simd/info.txt b/test/640-checker-int-simd/info.txt
deleted file mode 100644
index c9c6d5ed9f..0000000000
--- a/test/640-checker-int-simd/info.txt
+++ /dev/null
@@ -1 +0,0 @@
-Functional tests on SIMD vectorization.
diff --git a/test/640-checker-long-simd/expected.txt b/test/640-checker-long-simd/expected.txt
deleted file mode 100644
index b0aad4deb5..0000000000
--- a/test/640-checker-long-simd/expected.txt
+++ /dev/null
@@ -1 +0,0 @@
-passed
diff --git a/test/640-checker-long-simd/info.txt b/test/640-checker-long-simd/info.txt
deleted file mode 100644
index c9c6d5ed9f..0000000000
--- a/test/640-checker-long-simd/info.txt
+++ /dev/null
@@ -1 +0,0 @@
-Functional tests on SIMD vectorization.
diff --git a/test/640-checker-short-simd/expected.txt b/test/640-checker-short-simd/expected.txt
deleted file mode 100644
index b0aad4deb5..0000000000
--- a/test/640-checker-short-simd/expected.txt
+++ /dev/null
@@ -1 +0,0 @@
-passed
diff --git a/test/640-checker-short-simd/info.txt b/test/640-checker-short-simd/info.txt
deleted file mode 100644
index c9c6d5ed9f..0000000000
--- a/test/640-checker-short-simd/info.txt
+++ /dev/null
@@ -1 +0,0 @@
-Functional tests on SIMD vectorization.
diff --git a/test/640-checker-simd/expected.txt b/test/640-checker-simd/expected.txt
new file mode 100644
index 0000000000..b7a4fcca9a
--- /dev/null
+++ b/test/640-checker-simd/expected.txt
@@ -0,0 +1,7 @@
+SimdByte passed
+SimdShort passed
+SimdChar passed
+SimdInt passed
+SimdLong passed
+SimdDouble passed
+SimdFloat passed
diff --git a/test/640-checker-byte-simd/info.txt b/test/640-checker-simd/info.txt
index c9c6d5ed9f..c9c6d5ed9f 100644
--- a/test/640-checker-byte-simd/info.txt
+++ b/test/640-checker-simd/info.txt
diff --git a/test/640-checker-simd/src/Main.java b/test/640-checker-simd/src/Main.java
new file mode 100644
index 0000000000..cece60c43f
--- /dev/null
+++ b/test/640-checker-simd/src/Main.java
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2019 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+public class Main {
+  public static void main(String[] args) {
+    SimdByte.main();
+    SimdShort.main();
+    SimdChar.main();
+    SimdInt.main();
+    SimdLong.main();
+    SimdDouble.main();
+    SimdFloat.main();
+  }
+}
diff --git a/test/640-checker-byte-simd/src/Main.java b/test/640-checker-simd/src/SimdByte.java
index 6b691277b0..2ce99f4460 100644
--- a/test/640-checker-byte-simd/src/Main.java
+++ b/test/640-checker-simd/src/SimdByte.java
@@ -17,7 +17,7 @@
 /**
  * Functional tests for SIMD vectorization.
  */
-public class Main {
+public class SimdByte {
 
   static byte[] a;
 
@@ -25,11 +25,11 @@ public class Main {
   // Arithmetic operations.
   //
 
-  /// CHECK-START: void Main.add(int) loop_optimization (before)
+  /// CHECK-START: void SimdByte.add(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.add(int) loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdByte.add(int) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecAdd   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -38,11 +38,11 @@ public class Main {
       a[i] += x;
   }
 
-  /// CHECK-START: void Main.sub(int) loop_optimization (before)
+  /// CHECK-START: void SimdByte.sub(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.sub(int) loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdByte.sub(int) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecSub   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -51,11 +51,11 @@ public class Main {
       a[i] -= x;
   }
 
-  /// CHECK-START: void Main.mul(int) loop_optimization (before)
+  /// CHECK-START: void SimdByte.mul(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.mul(int) loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdByte.mul(int) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecMul   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -64,11 +64,11 @@ public class Main {
       a[i] *= x;
   }
 
-  /// CHECK-START: void Main.div(int) loop_optimization (before)
+  /// CHECK-START: void SimdByte.div(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START: void Main.div(int) loop_optimization (after)
+  /// CHECK-START: void SimdByte.div(int) loop_optimization (after)
   //
   //  Not supported on any architecture.
   //
@@ -77,11 +77,11 @@ public class Main {
       a[i] /= x;
   }
 
-  /// CHECK-START: void Main.neg() loop_optimization (before)
+  /// CHECK-START: void SimdByte.neg() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.neg() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdByte.neg() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecNeg   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -90,11 +90,11 @@ public class Main {
       a[i] = (byte) -a[i];
   }
 
-  /// CHECK-START: void Main.not() loop_optimization (before)
+  /// CHECK-START: void SimdByte.not() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.not() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdByte.not() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecNot   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -103,11 +103,11 @@ public class Main {
       a[i] = (byte) ~a[i];
   }
 
-  /// CHECK-START: void Main.shl4() loop_optimization (before)
+  /// CHECK-START: void SimdByte.shl4() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.shl4() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdByte.shl4() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecShl   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -116,11 +116,11 @@ public class Main {
       a[i] <<= 4;
   }
 
-  /// CHECK-START: void Main.sar2() loop_optimization (before)
+  /// CHECK-START: void SimdByte.sar2() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.sar2() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdByte.sar2() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecShr   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -129,12 +129,12 @@ public class Main {
       a[i] >>= 2;
   }
 
-  /// CHECK-START: void Main.shr2() loop_optimization (before)
+  /// CHECK-START: void SimdByte.shr2() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
   // TODO: would need signess flip.
-  /// CHECK-START: void Main.shr2() loop_optimization (after)
+  /// CHECK-START: void SimdByte.shr2() loop_optimization (after)
   /// CHECK-NOT: VecUShr
   static void shr2() {
     for (int i = 0; i < 128; i++)
@@ -183,7 +183,7 @@ public class Main {
   // Test Driver.
   //
 
-  public static void main(String[] args) {
+  public static void main() {
     // Set up.
     a = new byte[128];
     for (int i = 0; i < 128; i++) {
@@ -261,7 +261,7 @@ public class Main {
       expectEquals((byte) 0x0f, a[i], "not");
     }
     // Done.
-    System.out.println("passed");
+    System.out.println("SimdByte passed");
   }
 
   private static void expectEquals(int expected, int result, String action) {
diff --git a/test/640-checker-char-simd/src/Main.java b/test/640-checker-simd/src/SimdChar.java
index 317a666980..ceb4bb8de3 100644
--- a/test/640-checker-char-simd/src/Main.java
+++ b/test/640-checker-simd/src/SimdChar.java
@@ -17,7 +17,7 @@
 /**
  * Functional tests for SIMD vectorization.
  */
-public class Main {
+public class SimdChar {
 
   static char[] a;
 
@@ -25,11 +25,11 @@ public class Main {
   // Arithmetic operations.
   //
 
-  /// CHECK-START: void Main.add(int) loop_optimization (before)
+  /// CHECK-START: void SimdChar.add(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.add(int) loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdChar.add(int) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecAdd   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -38,11 +38,11 @@ public class Main {
       a[i] += x;
   }
 
-  /// CHECK-START: void Main.sub(int) loop_optimization (before)
+  /// CHECK-START: void SimdChar.sub(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.sub(int) loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdChar.sub(int) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecSub   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -51,11 +51,11 @@ public class Main {
       a[i] -= x;
   }
 
-  /// CHECK-START: void Main.mul(int) loop_optimization (before)
+  /// CHECK-START: void SimdChar.mul(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.mul(int) loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdChar.mul(int) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecMul   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -64,11 +64,11 @@ public class Main {
       a[i] *= x;
   }
 
-  /// CHECK-START: void Main.div(int) loop_optimization (before)
+  /// CHECK-START: void SimdChar.div(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START: void Main.div(int) loop_optimization (after)
+  /// CHECK-START: void SimdChar.div(int) loop_optimization (after)
   /// CHECK-NOT: VecDiv
   //
   //  Not supported on any architecture.
@@ -78,11 +78,11 @@ public class Main {
       a[i] /= x;
   }
 
-  /// CHECK-START: void Main.neg() loop_optimization (before)
+  /// CHECK-START: void SimdChar.neg() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.neg() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdChar.neg() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecNeg   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -91,11 +91,11 @@ public class Main {
       a[i] = (char) -a[i];
   }
 
-  /// CHECK-START: void Main.not() loop_optimization (before)
+  /// CHECK-START: void SimdChar.not() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.not() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdChar.not() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecNot   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -104,11 +104,11 @@ public class Main {
       a[i] = (char) ~a[i];
   }
 
-  /// CHECK-START: void Main.shl4() loop_optimization (before)
+  /// CHECK-START: void SimdChar.shl4() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.shl4() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdChar.shl4() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecShl   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -117,23 +117,23 @@ public class Main {
       a[i] <<= 4;
   }
 
-  /// CHECK-START: void Main.sar2() loop_optimization (before)
+  /// CHECK-START: void SimdChar.sar2() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
   // TODO: would need signess flip.
-  /// CHECK-START: void Main.sar2() loop_optimization (after)
+  /// CHECK-START: void SimdChar.sar2() loop_optimization (after)
   /// CHECK-NOT: VecShr
   static void sar2() {
     for (int i = 0; i < 128; i++)
       a[i] >>= 2;
   }
 
-  /// CHECK-START: void Main.shr2() loop_optimization (before)
+  /// CHECK-START: void SimdChar.shr2() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.shr2() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdChar.shr2() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecUShr  loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -179,7 +179,7 @@ public class Main {
   // Test Driver.
   //
 
-  public static void main(String[] args) {
+  public static void main() {
     // Set up.
     a = new char[128];
     for (int i = 0; i < 128; i++) {
@@ -254,7 +254,7 @@ public class Main {
       expectEquals((char) 0x0e0f, a[i], "not");
     }
     // Done.
-    System.out.println("passed");
+    System.out.println("SimdChar passed");
   }
 
   private static void expectEquals(int expected, int result, String action) {
diff --git a/test/640-checker-double-simd/src/Main.java b/test/640-checker-simd/src/SimdDouble.java
index 0f04f734cc..970bca9a39 100644
--- a/test/640-checker-double-simd/src/Main.java
+++ b/test/640-checker-simd/src/SimdDouble.java
@@ -18,7 +18,7 @@
  * Functional tests for SIMD vectorization. Note that this class provides a mere
  * functional test, not a precise numerical verifier.
  */
-public class Main {
+public class SimdDouble {
 
   static double[] a;
 
@@ -26,11 +26,11 @@ public class Main {
   // Arithmetic operations.
   //
 
-  /// CHECK-START: void Main.add(double) loop_optimization (before)
+  /// CHECK-START: void SimdDouble.add(double) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.add(double) loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdDouble.add(double) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecAdd   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -39,11 +39,11 @@ public class Main {
       a[i] += x;
   }
 
-  /// CHECK-START: void Main.sub(double) loop_optimization (before)
+  /// CHECK-START: void SimdDouble.sub(double) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.sub(double) loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdDouble.sub(double) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecSub   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -52,11 +52,11 @@ public class Main {
       a[i] -= x;
   }
 
-  /// CHECK-START: void Main.mul(double) loop_optimization (before)
+  /// CHECK-START: void SimdDouble.mul(double) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.mul(double) loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdDouble.mul(double) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecMul   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -65,11 +65,11 @@ public class Main {
       a[i] *= x;
   }
 
-  /// CHECK-START: void Main.div(double) loop_optimization (before)
+  /// CHECK-START: void SimdDouble.div(double) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.div(double) loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdDouble.div(double) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecDiv   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -78,11 +78,11 @@ public class Main {
       a[i] /= x;
   }
 
-  /// CHECK-START: void Main.neg() loop_optimization (before)
+  /// CHECK-START: void SimdDouble.neg() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.neg() loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdDouble.neg() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecNeg   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -91,11 +91,11 @@ public class Main {
       a[i] = -a[i];
   }
 
-  /// CHECK-START: void Main.abs() loop_optimization (before)
+  /// CHECK-START: void SimdDouble.abs() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.abs() loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdDouble.abs() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecAbs   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -104,11 +104,11 @@ public class Main {
       a[i] = Math.abs(a[i]);
   }
 
-  /// CHECK-START: void Main.conv(long[]) loop_optimization (before)
+  /// CHECK-START: void SimdDouble.conv(long[]) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START: void Main.conv(long[]) loop_optimization (after)
+  /// CHECK-START: void SimdDouble.conv(long[]) loop_optimization (after)
   /// CHECK-NOT: VecLoad
   /// CHECK-NOT: VecStore
   //
@@ -131,7 +131,7 @@ public class Main {
   // Test Driver.
   //
 
-  public static void main(String[] args) {
+  public static void main() {
     // Set up.
     a = new double[128];
     for (int i = 0; i < 128; i++) {
@@ -185,7 +185,7 @@ public class Main {
       expectEquals(1000.0 * i, a[i], "conv");
     }
     // Done.
-    System.out.println("passed");
+    System.out.println("SimdDouble passed");
   }
 
   private static void expectEquals(double expected, double result, String action) {
diff --git a/test/640-checker-float-simd/src/Main.java b/test/640-checker-simd/src/SimdFloat.java
index d4eef9f763..7d67a5432e 100644
--- a/test/640-checker-float-simd/src/Main.java
+++ b/test/640-checker-simd/src/SimdFloat.java
@@ -18,7 +18,7 @@
  * Functional tests for SIMD vectorization. Note that this class provides a mere
  * functional test, not a precise numerical verifier.
  */
-public class Main {
+public class SimdFloat {
 
   static float[] a;
 
@@ -26,11 +26,11 @@ public class Main {
   // Arithmetic operations.
   //
 
-  /// CHECK-START: void Main.add(float) loop_optimization (before)
+  /// CHECK-START: void SimdFloat.add(float) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.add(float) loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdFloat.add(float) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecAdd   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -39,11 +39,11 @@ public class Main {
       a[i] += x;
   }
 
-  /// CHECK-START: void Main.sub(float) loop_optimization (before)
+  /// CHECK-START: void SimdFloat.sub(float) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.sub(float) loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdFloat.sub(float) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecSub   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -52,11 +52,11 @@ public class Main {
       a[i] -= x;
   }
 
-  /// CHECK-START: void Main.mul(float) loop_optimization (before)
+  /// CHECK-START: void SimdFloat.mul(float) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.mul(float) loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdFloat.mul(float) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecMul   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -65,11 +65,11 @@ public class Main {
       a[i] *= x;
   }
 
-  /// CHECK-START: void Main.div(float) loop_optimization (before)
+  /// CHECK-START: void SimdFloat.div(float) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.div(float) loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdFloat.div(float) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecDiv   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -78,11 +78,11 @@ public class Main {
       a[i] /= x;
   }
 
-  /// CHECK-START: void Main.neg() loop_optimization (before)
+  /// CHECK-START: void SimdFloat.neg() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.neg() loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdFloat.neg() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecNeg   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -91,11 +91,11 @@ public class Main {
       a[i] = -a[i];
   }
 
-  /// CHECK-START: void Main.abs() loop_optimization (before)
+  /// CHECK-START: void SimdFloat.abs() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.abs() loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdFloat.abs() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecAbs   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -104,11 +104,11 @@ public class Main {
       a[i] = Math.abs(a[i]);
   }
 
-  /// CHECK-START: void Main.conv(int[]) loop_optimization (before)
+  /// CHECK-START: void SimdFloat.conv(int[]) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.conv(int[]) loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdFloat.conv(int[]) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecCnv   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -130,7 +130,7 @@ public class Main {
   // Test Driver.
   //
 
-  public static void main(String[] args) {
+  public static void main() {
     // Set up.
     a = new float[128];
     for (int i = 0; i < 128; i++) {
@@ -184,7 +184,7 @@ public class Main {
       expectEquals(1000.0f * i, a[i], "conv");
     }
     // Done.
-    System.out.println("passed");
+    System.out.println("SimdFloat passed");
   }
 
   private static void expectEquals(float expected, float result, String action) {
diff --git a/test/640-checker-int-simd/src/Main.java b/test/640-checker-simd/src/SimdInt.java
index 85d8b1b70b..9f33126b94 100644
--- a/test/640-checker-int-simd/src/Main.java
+++ b/test/640-checker-simd/src/SimdInt.java
@@ -17,7 +17,7 @@
 /**
  * Functional tests for SIMD vectorization.
  */
-public class Main {
+public class SimdInt {
 
   static int[] a;
 
@@ -25,11 +25,11 @@ public class Main {
   // Arithmetic operations.
   //
 
-  /// CHECK-START: void Main.add(int) loop_optimization (before)
+  /// CHECK-START: void SimdInt.add(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.add(int) loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdInt.add(int) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecAdd   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -38,11 +38,11 @@ public class Main {
       a[i] += x;
   }
 
-  /// CHECK-START: void Main.sub(int) loop_optimization (before)
+  /// CHECK-START: void SimdInt.sub(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.sub(int) loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdInt.sub(int) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecSub   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -51,11 +51,11 @@ public class Main {
       a[i] -= x;
   }
 
-  /// CHECK-START: void Main.mul(int) loop_optimization (before)
+  /// CHECK-START: void SimdInt.mul(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.mul(int) loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdInt.mul(int) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecMul   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -64,11 +64,11 @@ public class Main {
       a[i] *= x;
   }
 
-  /// CHECK-START: void Main.div(int) loop_optimization (before)
+  /// CHECK-START: void SimdInt.div(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START: void Main.div(int) loop_optimization (after)
+  /// CHECK-START: void SimdInt.div(int) loop_optimization (after)
   /// CHECK-NOT: VecDiv
   //
   //  Not supported on any architecture.
@@ -78,11 +78,11 @@ public class Main {
       a[i] /= x;
   }
 
-  /// CHECK-START: void Main.neg() loop_optimization (before)
+  /// CHECK-START: void SimdInt.neg() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.neg() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdInt.neg() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecNeg   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -91,11 +91,11 @@ public class Main {
       a[i] = -a[i];
   }
 
-  /// CHECK-START: void Main.not() loop_optimization (before)
+  /// CHECK-START: void SimdInt.not() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.not() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdInt.not() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecNot   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -104,11 +104,11 @@ public class Main {
       a[i] = ~a[i];
   }
 
-  /// CHECK-START: void Main.shl4() loop_optimization (before)
+  /// CHECK-START: void SimdInt.shl4() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.shl4() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdInt.shl4() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecShl   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -117,11 +117,11 @@ public class Main {
       a[i] <<= 4;
   }
 
-  /// CHECK-START: void Main.sar2() loop_optimization (before)
+  /// CHECK-START: void SimdInt.sar2() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.sar2() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdInt.sar2() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecShr   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -130,11 +130,11 @@ public class Main {
       a[i] >>= 2;
   }
 
-  /// CHECK-START: void Main.shr2() loop_optimization (before)
+  /// CHECK-START: void SimdInt.shr2() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.shr2() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdInt.shr2() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecUShr  loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -152,17 +152,17 @@ public class Main {
   public static int $opt$inline$IntConstant33()       { return 33; }
   public static int $opt$inline$IntConstantMinus254() { return -254; }
 
-  /// CHECK-START: void Main.shr32() instruction_simplifier$after_inlining (before)
+  /// CHECK-START: void SimdInt.shr32() instruction_simplifier$after_inlining (before)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant 32                        loop:none
   /// CHECK-DAG: <<Get:i\d+>>  ArrayGet                              loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:i\d+>> UShr [<<Get>>,<<Dist>>]               loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG:               ArraySet [{{l\d+}},{{i\d+}},<<UShr>>] loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START: void Main.shr32() instruction_simplifier$after_inlining (after)
+  /// CHECK-START: void SimdInt.shr32() instruction_simplifier$after_inlining (after)
   /// CHECK-DAG: <<Get:i\d+>> ArrayGet                             loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG:              ArraySet [{{l\d+}},{{i\d+}},<<Get>>] loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.shr32() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdInt.shr32() loop_optimization (after)
   /// CHECK-DAG: <<Get:d\d+>> VecLoad                              loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG:              VecStore [{{l\d+}},{{i\d+}},<<Get>>] loop:<<Loop>>      outer_loop:none
   static void shr32() {
@@ -171,19 +171,19 @@ public class Main {
       a[i] >>>= $opt$inline$IntConstant32();  // 0, since & 31
   }
 
-  /// CHECK-START: void Main.shr33() instruction_simplifier$after_inlining (before)
+  /// CHECK-START: void SimdInt.shr33() instruction_simplifier$after_inlining (before)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant 33                        loop:none
   /// CHECK-DAG: <<Get:i\d+>>  ArrayGet                              loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:i\d+>> UShr [<<Get>>,<<Dist>>]               loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG:               ArraySet [{{l\d+}},{{i\d+}},<<UShr>>] loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START: void Main.shr33() instruction_simplifier$after_inlining (after)
+  /// CHECK-START: void SimdInt.shr33() instruction_simplifier$after_inlining (after)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant 1                         loop:none
   /// CHECK-DAG: <<Get:i\d+>>  ArrayGet                              loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:i\d+>> UShr [<<Get>>,<<Dist>>]               loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG:               ArraySet [{{l\d+}},{{i\d+}},<<UShr>>] loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.shr33() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdInt.shr33() loop_optimization (after)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant 1                         loop:none
   /// CHECK-DAG: <<Get:d\d+>>  VecLoad                               loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:d\d+>> VecUShr [<<Get>>,<<Dist>>]            loop:<<Loop>>      outer_loop:none
@@ -193,19 +193,19 @@ public class Main {
       a[i] >>>= $opt$inline$IntConstant33();  // 1, since & 31
   }
 
-  /// CHECK-START: void Main.shrMinus254() instruction_simplifier$after_inlining (before)
+  /// CHECK-START: void SimdInt.shrMinus254() instruction_simplifier$after_inlining (before)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant -254                      loop:none
   /// CHECK-DAG: <<Get:i\d+>>  ArrayGet                              loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:i\d+>> UShr [<<Get>>,<<Dist>>]               loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG:               ArraySet [{{l\d+}},{{i\d+}},<<UShr>>] loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START: void Main.shrMinus254() instruction_simplifier$after_inlining (after)
+  /// CHECK-START: void SimdInt.shrMinus254() instruction_simplifier$after_inlining (after)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant 2                         loop:none
   /// CHECK-DAG: <<Get:i\d+>>  ArrayGet                              loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:i\d+>> UShr [<<Get>>,<<Dist>>]               loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG:               ArraySet [{{l\d+}},{{i\d+}},<<UShr>>] loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.shrMinus254() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdInt.shrMinus254() loop_optimization (after)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant 2                         loop:none
   /// CHECK-DAG: <<Get:d\d+>>  VecLoad                               loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:d\d+>> VecUShr [<<Get>>,<<Dist>>]            loop:<<Loop>>      outer_loop:none
@@ -228,7 +228,7 @@ public class Main {
   // Test Driver.
   //
 
-  public static void main(String[] args) {
+  public static void main() {
     // Set up.
     a = new int[128];
     for (int i = 0; i < 128; i++) {
@@ -296,7 +296,7 @@ public class Main {
       expectEquals(0xf8000000, a[i], "not");
     }
     // Done.
-    System.out.println("passed");
+    System.out.println("SimdInt passed");
   }
 
   private static void expectEquals(int expected, int result, String action) {
diff --git a/test/640-checker-long-simd/src/Main.java b/test/640-checker-simd/src/SimdLong.java
index bb4d0cbd67..59ce2bc877 100644
--- a/test/640-checker-long-simd/src/Main.java
+++ b/test/640-checker-simd/src/SimdLong.java
@@ -17,7 +17,7 @@
 /**
  * Functional tests for SIMD vectorization.
  */
-public class Main {
+public class SimdLong {
 
   static long[] a;
 
@@ -25,11 +25,11 @@ public class Main {
   // Arithmetic operations.
   //
 
-  /// CHECK-START: void Main.add(long) loop_optimization (before)
+  /// CHECK-START: void SimdLong.add(long) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.add(long) loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdLong.add(long) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecAdd   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -38,11 +38,11 @@ public class Main {
       a[i] += x;
   }
 
-  /// CHECK-START: void Main.sub(long) loop_optimization (before)
+  /// CHECK-START: void SimdLong.sub(long) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.sub(long) loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdLong.sub(long) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecSub   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -51,16 +51,16 @@ public class Main {
       a[i] -= x;
   }
 
-  /// CHECK-START: void Main.mul(long) loop_optimization (before)
+  /// CHECK-START: void SimdLong.mul(long) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
   //  Not directly supported for longs.
   //
-  /// CHECK-START-ARM64: void Main.mul(long) loop_optimization (after)
+  /// CHECK-START-ARM64: void SimdLong.mul(long) loop_optimization (after)
   /// CHECK-NOT: VecMul
   //
-  /// CHECK-START-MIPS64: void Main.mul(long) loop_optimization (after)
+  /// CHECK-START-MIPS64: void SimdLong.mul(long) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecMul   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -69,11 +69,11 @@ public class Main {
       a[i] *= x;
   }
 
-  /// CHECK-START: void Main.div(long) loop_optimization (before)
+  /// CHECK-START: void SimdLong.div(long) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START: void Main.div(long) loop_optimization (after)
+  /// CHECK-START: void SimdLong.div(long) loop_optimization (after)
   /// CHECK-NOT: VecDiv
   //
   //  Not supported on any architecture.
@@ -83,11 +83,11 @@ public class Main {
       a[i] /= x;
   }
 
-  /// CHECK-START: void Main.neg() loop_optimization (before)
+  /// CHECK-START: void SimdLong.neg() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.neg() loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdLong.neg() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecNeg   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -96,11 +96,11 @@ public class Main {
       a[i] = -a[i];
   }
 
-  /// CHECK-START: void Main.not() loop_optimization (before)
+  /// CHECK-START: void SimdLong.not() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.not() loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdLong.not() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecNot   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -109,11 +109,11 @@ public class Main {
       a[i] = ~a[i];
   }
 
-  /// CHECK-START: void Main.shl4() loop_optimization (before)
+  /// CHECK-START: void SimdLong.shl4() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.shl4() loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdLong.shl4() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecShl   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -122,11 +122,11 @@ public class Main {
       a[i] <<= 4;
   }
 
-  /// CHECK-START: void Main.sar2() loop_optimization (before)
+  /// CHECK-START: void SimdLong.sar2() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.sar2() loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdLong.sar2() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecShr   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -135,11 +135,11 @@ public class Main {
       a[i] >>= 2;
   }
 
-  /// CHECK-START: void Main.shr2() loop_optimization (before)
+  /// CHECK-START: void SimdLong.shr2() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.shr2() loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdLong.shr2() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecUShr  loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -157,17 +157,17 @@ public class Main {
   public static int $opt$inline$IntConstant65()       { return 65; }
   public static int $opt$inline$IntConstantMinus254() { return -254; }
 
-  /// CHECK-START: void Main.shr64() instruction_simplifier$after_inlining (before)
+  /// CHECK-START: void SimdLong.shr64() instruction_simplifier$after_inlining (before)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant 64                        loop:none
   /// CHECK-DAG: <<Get:j\d+>>  ArrayGet                              loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:j\d+>> UShr [<<Get>>,<<Dist>>]               loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG:               ArraySet [{{l\d+}},{{i\d+}},<<UShr>>] loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START: void Main.shr64() instruction_simplifier$after_inlining (after)
+  /// CHECK-START: void SimdLong.shr64() instruction_simplifier$after_inlining (after)
   /// CHECK-DAG: <<Get:j\d+>> ArrayGet                             loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG:              ArraySet [{{l\d+}},{{i\d+}},<<Get>>] loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.shr64() loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdLong.shr64() loop_optimization (after)
   /// CHECK-DAG: <<Get:d\d+>> VecLoad                              loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG:              VecStore [{{l\d+}},{{i\d+}},<<Get>>] loop:<<Loop>>      outer_loop:none
   static void shr64() {
@@ -176,19 +176,19 @@ public class Main {
       a[i] >>>= $opt$inline$IntConstant64();  // 0, since & 63
   }
 
-  /// CHECK-START: void Main.shr65() instruction_simplifier$after_inlining (before)
+  /// CHECK-START: void SimdLong.shr65() instruction_simplifier$after_inlining (before)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant 65                        loop:none
   /// CHECK-DAG: <<Get:j\d+>>  ArrayGet                              loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:j\d+>> UShr [<<Get>>,<<Dist>>]               loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG:               ArraySet [{{l\d+}},{{i\d+}},<<UShr>>] loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START: void Main.shr65() instruction_simplifier$after_inlining (after)
+  /// CHECK-START: void SimdLong.shr65() instruction_simplifier$after_inlining (after)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant 1                         loop:none
   /// CHECK-DAG: <<Get:j\d+>>  ArrayGet                              loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:j\d+>> UShr [<<Get>>,<<Dist>>]               loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG:               ArraySet [{{l\d+}},{{i\d+}},<<UShr>>] loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.shr65() loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdLong.shr65() loop_optimization (after)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant 1                         loop:none
   /// CHECK-DAG: <<Get:d\d+>>  VecLoad                               loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:d\d+>> VecUShr [<<Get>>,<<Dist>>]            loop:<<Loop>>      outer_loop:none
@@ -198,19 +198,19 @@ public class Main {
       a[i] >>>= $opt$inline$IntConstant65();  // 1, since & 63
   }
 
-  /// CHECK-START: void Main.shrMinus254() instruction_simplifier$after_inlining (before)
+  /// CHECK-START: void SimdLong.shrMinus254() instruction_simplifier$after_inlining (before)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant -254                      loop:none
   /// CHECK-DAG: <<Get:j\d+>>  ArrayGet                              loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:j\d+>> UShr [<<Get>>,<<Dist>>]               loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG:               ArraySet [{{l\d+}},{{i\d+}},<<UShr>>] loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START: void Main.shrMinus254() instruction_simplifier$after_inlining (after)
+  /// CHECK-START: void SimdLong.shrMinus254() instruction_simplifier$after_inlining (after)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant 2                         loop:none
   /// CHECK-DAG: <<Get:j\d+>>  ArrayGet                              loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:j\d+>> UShr [<<Get>>,<<Dist>>]               loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG:               ArraySet [{{l\d+}},{{i\d+}},<<UShr>>] loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM64,MIPS64}: void Main.shrMinus254() loop_optimization (after)
+  /// CHECK-START-{ARM64,MIPS64}: void SimdLong.shrMinus254() loop_optimization (after)
   /// CHECK-DAG: <<Dist:i\d+>> IntConstant 2                         loop:none
   /// CHECK-DAG: <<Get:d\d+>>  VecLoad                               loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: <<UShr:d\d+>> VecUShr [<<Get>>,<<Dist>>]            loop:<<Loop>>      outer_loop:none
@@ -233,7 +233,7 @@ public class Main {
   // Test Driver.
   //
 
-  public static void main(String[] args) {
+  public static void main() {
     // Set up.
     a = new long[128];
     for (int i = 0; i < 128; i++) {
@@ -301,7 +301,7 @@ public class Main {
       expectEquals(0xf800000000000000L, a[i], "not");
     }
     // Done.
-    System.out.println("passed");
+    System.out.println("SimdLong passed");
   }
 
   private static void expectEquals(long expected, long result, String action) {
diff --git a/test/640-checker-short-simd/src/Main.java b/test/640-checker-simd/src/SimdShort.java
index 2b4ba87b71..1039e2e6bb 100644
--- a/test/640-checker-short-simd/src/Main.java
+++ b/test/640-checker-simd/src/SimdShort.java
@@ -17,7 +17,7 @@
 /**
  * Functional tests for SIMD vectorization.
  */
-public class Main {
+public class SimdShort {
 
   static short[] a;
 
@@ -25,11 +25,11 @@ public class Main {
   // Arithmetic operations.
   //
 
-  /// CHECK-START: void Main.add(int) loop_optimization (before)
+  /// CHECK-START: void SimdShort.add(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.add(int) loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.add(int) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecAdd   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -38,11 +38,11 @@ public class Main {
       a[i] += x;
   }
 
-  /// CHECK-START: void Main.sub(int) loop_optimization (before)
+  /// CHECK-START: void SimdShort.sub(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.sub(int) loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.sub(int) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecSub   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -51,11 +51,11 @@ public class Main {
       a[i] -= x;
   }
 
-  /// CHECK-START: void Main.mul(int) loop_optimization (before)
+  /// CHECK-START: void SimdShort.mul(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.mul(int) loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.mul(int) loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecMul   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -64,11 +64,11 @@ public class Main {
       a[i] *= x;
   }
 
-  /// CHECK-START: void Main.div(int) loop_optimization (before)
+  /// CHECK-START: void SimdShort.div(int) loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START: void Main.div(int) loop_optimization (after)
+  /// CHECK-START: void SimdShort.div(int) loop_optimization (after)
   /// CHECK-NOT: VecDiv
   //
   //  Not supported on any architecture.
@@ -78,11 +78,11 @@ public class Main {
       a[i] /= x;
   }
 
-  /// CHECK-START: void Main.neg() loop_optimization (before)
+  /// CHECK-START: void SimdShort.neg() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.neg() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.neg() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecNeg   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -91,11 +91,11 @@ public class Main {
       a[i] = (short) -a[i];
   }
 
-  /// CHECK-START: void Main.not() loop_optimization (before)
+  /// CHECK-START: void SimdShort.not() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.not() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.not() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecNot   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -104,11 +104,11 @@ public class Main {
       a[i] = (short) ~a[i];
   }
 
-  /// CHECK-START: void Main.shl4() loop_optimization (before)
+  /// CHECK-START: void SimdShort.shl4() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.shl4() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.shl4() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecShl   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -117,11 +117,11 @@ public class Main {
       a[i] <<= 4;
   }
 
-  /// CHECK-START: void Main.sar2() loop_optimization (before)
+  /// CHECK-START: void SimdShort.sar2() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
-  /// CHECK-START-{ARM,ARM64,MIPS64}: void Main.sar2() loop_optimization (after)
+  /// CHECK-START-{ARM,ARM64,MIPS64}: void SimdShort.sar2() loop_optimization (after)
   /// CHECK-DAG: VecLoad  loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: VecShr   loop:<<Loop>>      outer_loop:none
   /// CHECK-DAG: VecStore loop:<<Loop>>      outer_loop:none
@@ -130,12 +130,12 @@ public class Main {
       a[i] >>= 2;
   }
 
-  /// CHECK-START: void Main.shr2() loop_optimization (before)
+  /// CHECK-START: void SimdShort.shr2() loop_optimization (before)
   /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none
   /// CHECK-DAG: ArraySet loop:<<Loop>>      outer_loop:none
   //
   // TODO: would need signess flip.
-  /// CHECK-START: void Main.shr2() loop_optimization (after)
+  /// CHECK-START: void SimdShort.shr2() loop_optimization (after)
   /// CHECK-NOT: VecUShr
   static void shr2() {
     for (int i = 0; i < 128; i++)
@@ -180,7 +180,7 @@ public class Main {
   // Test Driver.
   //
 
-  public static void main(String[] args) {
+  public static void main() {
     // Set up.
     a = new short[128];
     for (int i = 0; i < 128; i++) {
@@ -253,7 +253,7 @@ public class Main {
       expectEquals((short) 0x0f0e, a[i], "not");
     }
     // Done.
-    System.out.println("passed");
+    System.out.println("SimdShort passed");
   }
 
   private static void expectEquals(int expected, int result, String action) {