Clean up `gUseReadBarrier` uses in JNI compiler.

Also clean up `gUseReadBarrier` uses in dex2oat/ and
move some host tests to `art_compiler_host_tests`.

Test: m test-art-host-gtest
Bug: 289805127
Change-Id: I0909480d3346a611e4b1dd066d7484a9656ec890

8 files changed, 25 insertions, 56 deletions

diff --git a/compiler/Android.bp b/compiler/Android.bp
index 57cda8fc69..110785dc6b 100644
--- a/compiler/Android.bp
+++ b/compiler/Android.bp
@@ -504,13 +504,11 @@ art_cc_defaults {
         "utils/atomic_dex_ref_map_test.cc",
         "utils/dedupe_set_test.cc",
 
-        "jni/jni_cfi_test.cc",
         "optimizing/codegen_test.cc",
         "optimizing/execution_subgraph_test.cc",
         "optimizing/instruction_simplifier_test.cc",
         "optimizing/load_store_analysis_test.cc",
         "optimizing/load_store_elimination_test.cc",
-        "optimizing/optimizing_cfi_test.cc",
         "optimizing/scheduler_test.cc",
     ],
 
@@ -594,6 +592,10 @@ art_cc_test {
     defaults: [
         "art_gtest_defaults",
     ],
+    srcs: [
+        "jni/jni_cfi_test.cc",
+        "optimizing/optimizing_cfi_test.cc",
+    ],
     tidy_timeout_srcs: [
         "utils/x86/assembler_x86_test.cc",
         "utils/x86_64/assembler_x86_64_test.cc",
diff --git a/compiler/common_compiler_test.cc b/compiler/common_compiler_test.cc
index 44ea3a5e5d..676f591c28 100644
--- a/compiler/common_compiler_test.cc
+++ b/compiler/common_compiler_test.cc
@@ -250,7 +250,7 @@ void CommonCompilerTestImpl::OverrideInstructionSetFeatures(InstructionSet instr
 }
 
 void CommonCompilerTestImpl::SetUpRuntimeOptionsImpl() {
-  compiler_options_.reset(new CompilerOptions);
+  compiler_options_ = CreateCompilerOptions(instruction_set_, "default");
   ApplyInstructionSet();
 }
 
diff --git a/compiler/jni/jni_cfi_test.cc b/compiler/jni/jni_cfi_test.cc
index ae5f2d0aa9..6c9803f324 100644
--- a/compiler/jni/jni_cfi_test.cc
+++ b/compiler/jni/jni_cfi_test.cc
@@ -33,9 +33,6 @@
 
 namespace art HIDDEN {
 
-// Run the tests only on host.
-#ifndef ART_TARGET_ANDROID
-
 class JNICFITest : public CFITest {
  public:
   // Enable this flag to generate the expected outputs.
@@ -125,31 +122,20 @@ class JNICFITest : public CFITest {
     TestImpl(InstructionSet::isa, #isa, expected_asm, expected_cfi);  \
   }
 
-// We can't use compile-time macros for read-barrier as the introduction
-// of userfaultfd-GC has made it a runtime choice.
-#define TEST_ISA_ONLY_CC(isa)                                           \
-  TEST_F(JNICFITest, isa) {                                             \
-    if (kUseBakerReadBarrier && gUseReadBarrier) {                      \
-      std::vector<uint8_t> expected_asm(expected_asm_##isa,             \
-          expected_asm_##isa + arraysize(expected_asm_##isa));          \
-      std::vector<uint8_t> expected_cfi(expected_cfi_##isa,             \
-          expected_cfi_##isa + arraysize(expected_cfi_##isa));          \
-      TestImpl(InstructionSet::isa, #isa, expected_asm, expected_cfi);  \
-    }                                                                   \
-  }
-
 #ifdef ART_ENABLE_CODEGEN_arm
-// Run the tests for ARM only with Baker read barriers, as the
-// expected generated code contains a Marking Register refresh
-// instruction.
-TEST_ISA_ONLY_CC(kThumb2)
+// Run the tests for ARM only if the Marking Register is reserved as the
+// expected generated code contains a Marking Register refresh instruction.
+#if defined(RESERVE_MARKING_REGISTER)
+TEST_ISA(kThumb2)
+#endif
 #endif
 
 #ifdef ART_ENABLE_CODEGEN_arm64
-// Run the tests for ARM64 only with Baker read barriers, as the
-// expected generated code contains a Marking Register refresh
-// instruction.
-TEST_ISA_ONLY_CC(kArm64)
+// Run the tests for ARM64 only if the Marking Register is reserved as the
+// expected generated code contains a Marking Register refresh instruction.
+#if defined(RESERVE_MARKING_REGISTER)
+TEST_ISA(kArm64)
+#endif
 #endif
 
 #ifdef ART_ENABLE_CODEGEN_x86
@@ -160,6 +146,4 @@ TEST_ISA(kX86)
 TEST_ISA(kX86_64)
 #endif
 
-#endif  // ART_TARGET_ANDROID
-
 }  // namespace art
diff --git a/compiler/optimizing/optimizing_cfi_test.cc b/compiler/optimizing/optimizing_cfi_test.cc
index 632c32a70b..9df4932f3c 100644
--- a/compiler/optimizing/optimizing_cfi_test.cc
+++ b/compiler/optimizing/optimizing_cfi_test.cc
@@ -35,9 +35,6 @@ namespace vixl32 = vixl::aarch32;
 
 namespace art HIDDEN {
 
-// Run the tests only on host.
-#ifndef ART_TARGET_ANDROID
-
 class OptimizingCFITest : public CFITest, public OptimizingUnitTestHelper {
  public:
   // Enable this flag to generate the expected outputs.
@@ -144,26 +141,15 @@ TEST_ISA(kThumb2)
 #endif
 
 #ifdef ART_ENABLE_CODEGEN_arm64
-// Run the tests for ARM64 only with Baker read barriers, as the
+// Run the tests for ARM64 only if the Marking Register is reserved as the
 // expected generated code saves and restore X21 and X22 (instead of
 // X20 and X21), as X20 is used as Marking Register in the Baker read
 // barrier configuration, and as such is removed from the set of
 // callee-save registers in the ARM64 code generator of the Optimizing
 // compiler.
-//
-// We can't use compile-time macros for read-barrier as the introduction
-// of userfaultfd-GC has made it a runtime choice.
-TEST_F(OptimizingCFITest, kArm64) {
-  if (kUseBakerReadBarrier && gUseReadBarrier) {
-    std::vector<uint8_t> expected_asm(
-        expected_asm_kArm64,
-        expected_asm_kArm64 + arraysize(expected_asm_kArm64));
-    std::vector<uint8_t> expected_cfi(
-        expected_cfi_kArm64,
-        expected_cfi_kArm64 + arraysize(expected_cfi_kArm64));
-    TestImpl(InstructionSet::kArm64, "kArm64", expected_asm, expected_cfi);
-  }
-}
+#if defined(RESERVE_MARKING_REGISTER)
+TEST_ISA(kArm64)
+#endif
 #endif
 
 #ifdef ART_ENABLE_CODEGEN_x86
@@ -199,6 +185,4 @@ TEST_F(OptimizingCFITest, kThumb2Adjust) {
 }
 #endif
 
-#endif  // ART_TARGET_ANDROID
-
 }  // namespace art
diff --git a/compiler/utils/arm/jni_macro_assembler_arm_vixl.cc b/compiler/utils/arm/jni_macro_assembler_arm_vixl.cc
index 7a887fa064..2c0a71ffb3 100644
--- a/compiler/utils/arm/jni_macro_assembler_arm_vixl.cc
+++ b/compiler/utils/arm/jni_macro_assembler_arm_vixl.cc
@@ -155,7 +155,7 @@ void ArmVIXLJNIMacroAssembler::RemoveFrame(size_t frame_size,
 
   // Pop LR to PC unless we need to emit some read barrier code just before returning.
   bool emit_code_before_return =
-      (gUseReadBarrier && kUseBakerReadBarrier) &&
+      kReserveMarkingRegister &&
       (may_suspend || (kIsDebugBuild && emit_run_time_checks_in_debug_mode_));
   if ((core_spill_mask & (1u << lr.GetCode())) != 0u && !emit_code_before_return) {
     DCHECK_EQ(core_spill_mask & (1u << pc.GetCode()), 0u);
@@ -1026,7 +1026,6 @@ void ArmVIXLJNIMacroAssembler::TestGcMarking(JNIMacroLabel* label, JNIMacroUnary
   UseScratchRegisterScope temps(asm_.GetVIXLAssembler());
   vixl32::Register test_reg;
   DCHECK_EQ(Thread::IsGcMarkingSize(), 4u);
-  DCHECK(gUseReadBarrier);
   if (kUseBakerReadBarrier) {
     // TestGcMarking() is used in the JNI stub entry when the marking register is up to date.
     if (kIsDebugBuild && emit_run_time_checks_in_debug_mode_) {
diff --git a/compiler/utils/arm64/jni_macro_assembler_arm64.cc b/compiler/utils/arm64/jni_macro_assembler_arm64.cc
index c5380695d9..8ce44b6c63 100644
--- a/compiler/utils/arm64/jni_macro_assembler_arm64.cc
+++ b/compiler/utils/arm64/jni_macro_assembler_arm64.cc
@@ -811,7 +811,6 @@ void Arm64JNIMacroAssembler::TestGcMarking(JNIMacroLabel* label, JNIMacroUnaryCo
   UseScratchRegisterScope temps(asm_.GetVIXLAssembler());
   Register test_reg;
   DCHECK_EQ(Thread::IsGcMarkingSize(), 4u);
-  DCHECK(gUseReadBarrier);
   if (kUseBakerReadBarrier) {
     // TestGcMarking() is used in the JNI stub entry when the marking register is up to date.
     if (kIsDebugBuild && emit_run_time_checks_in_debug_mode_) {
diff --git a/dex2oat/linker/arm64/relative_patcher_arm64.cc b/dex2oat/linker/arm64/relative_patcher_arm64.cc
index 6b8447223b..0c34cb8d38 100644
--- a/dex2oat/linker/arm64/relative_patcher_arm64.cc
+++ b/dex2oat/linker/arm64/relative_patcher_arm64.cc
@@ -251,13 +251,13 @@ void Arm64RelativePatcher::PatchPcRelativeReference(std::vector<uint8_t>* code,
   } else {
     if ((insn & 0xfffffc00) == 0x91000000) {
       // ADD immediate, 64-bit with imm12 == 0 (unset).
-      if (!gUseReadBarrier) {
+      if (kUseBakerReadBarrier) {
         DCHECK(patch.GetType() == LinkerPatch::Type::kIntrinsicReference ||
                patch.GetType() == LinkerPatch::Type::kMethodRelative ||
                patch.GetType() == LinkerPatch::Type::kTypeRelative ||
                patch.GetType() == LinkerPatch::Type::kStringRelative) << patch.GetType();
       } else {
-        // With the read barrier (non-Baker) enabled, it could be kStringBssEntry or kTypeBssEntry.
+        // With the read barrier (non-Baker) enabled, it could be kStringBssEntry or k*TypeBssEntry.
         DCHECK(patch.GetType() == LinkerPatch::Type::kIntrinsicReference ||
                patch.GetType() == LinkerPatch::Type::kMethodRelative ||
                patch.GetType() == LinkerPatch::Type::kTypeRelative ||
diff --git a/dex2oat/linker/image_test.h b/dex2oat/linker/image_test.h
index 8dea9a6ff8..42a1393f98 100644
--- a/dex2oat/linker/image_test.h
+++ b/dex2oat/linker/image_test.h
@@ -224,8 +224,9 @@ inline void ImageTest::DoCompile(ImageHeader::StorageMode storage_mode,
       key_value_store.Put(OatHeader::kBootClassPathKey,
                           android::base::Join(out_helper.dex_file_locations, ':'));
       key_value_store.Put(OatHeader::kApexVersionsKey, Runtime::Current()->GetApexVersions());
-      key_value_store.Put(OatHeader::kConcurrentCopying,
-                          gUseReadBarrier ? OatHeader::kTrueValue : OatHeader::kFalseValue);
+      key_value_store.Put(
+          OatHeader::kConcurrentCopying,
+          compiler_options_->EmitReadBarrier() ? OatHeader::kTrueValue : OatHeader::kFalseValue);
 
       std::vector<std::unique_ptr<ElfWriter>> elf_writers;
       std::vector<std::unique_ptr<OatWriter>> oat_writers;