diff options
author | 2018-03-16 15:00:19 -0700 | |
---|---|---|
committer | 2018-03-16 15:00:19 -0700 | |
commit | 5a0eb0cbeeabda48bfef05df9f59a6fd607e1a1e (patch) | |
tree | 357b3a1a998107de6ec036fc107f897488d24a82 | |
parent | aae3435b642dbf3196ef47e8ec48ec3ca2a84d4b (diff) |
Minor DCHECK bug fix.
Rationale:
Should use the utility to test for SIMD result,
not a hard is vector test.
Test: 623 is regression test for DCHECK fail
Change-Id: I1d7949fa25139f8a3734986d5de7989ed32ff2bd
-rw-r--r-- | compiler/optimizing/nodes_vector.h | 2 | ||||
-rw-r--r-- | test/623-checker-loop-regressions/src/Main.java | 14 |
2 files changed, 15 insertions, 1 deletions
diff --git a/compiler/optimizing/nodes_vector.h b/compiler/optimizing/nodes_vector.h index 523bca8d25..9b114eb1f7 100644 --- a/compiler/optimizing/nodes_vector.h +++ b/compiler/optimizing/nodes_vector.h @@ -325,7 +325,7 @@ class HVecReplicateScalar FINAL : public HVecUnaryOperation { uint32_t dex_pc) : HVecUnaryOperation( kVecReplicateScalar, allocator, scalar, packed_type, vector_length, dex_pc) { - DCHECK(!scalar->IsVecOperation()); + DCHECK(!ReturnsSIMDValue(scalar)); } // A replicate needs to stay in place, since SIMD registers are not diff --git a/test/623-checker-loop-regressions/src/Main.java b/test/623-checker-loop-regressions/src/Main.java index 4e2b241fd7..ff6e335b7f 100644 --- a/test/623-checker-loop-regressions/src/Main.java +++ b/test/623-checker-loop-regressions/src/Main.java @@ -584,6 +584,18 @@ public class Main { s24 + s25 + s26 + s27 + s28 + s29 + s30 + s31; } + public static int reductionIntoReplication() { + int[] a = { 1, 2, 3, 4 }; + int x = 0; + for (int i = 0; i < 4; i++) { + x += a[i]; + } + for (int i = 0; i < 4; i++) { + a[i] = x; + } + return a[3]; + } + public static void main(String[] args) { System.loadLibrary(args[0]); @@ -767,6 +779,8 @@ public class Main { expectEquals(85800, reduction32Values(a1, a2, a3, a4)); } + expectEquals(10, reductionIntoReplication()); + System.out.println("passed"); } |