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| author | 2018-02-02 16:56:24 +0000 | |
|---|---|---|
| committer | 2018-02-02 16:56:24 +0000 | |
| commit | e65948f7c78919083224c1cd2ca47e827ced6d3e (patch) | |
| tree | 1a36cf65ad069a0bab733d8d089c741301266dca | |
| parent | 527984ac7329bdd4a492bd65b08848c9e6b9733e (diff) | |
| parent | 10049555c7504632beee8b6145fdcade7f31de62 (diff) | |
Merge "Revert^2 "ARM: Use r4 for stack overflow check to reduce code size.""
| -rw-r--r-- | compiler/optimizing/code_generator_arm_vixl.cc | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/compiler/optimizing/code_generator_arm_vixl.cc b/compiler/optimizing/code_generator_arm_vixl.cc index 704a0d3b87..6d49b32dbc 100644 --- a/compiler/optimizing/code_generator_arm_vixl.cc +++ b/compiler/optimizing/code_generator_arm_vixl.cc @@ -2498,8 +2498,23 @@ void CodeGeneratorARMVIXL::GenerateFrameEntry() { } if (!skip_overflow_check) { + // Using r4 instead of IP saves 2 bytes. UseScratchRegisterScope temps(GetVIXLAssembler()); - vixl32::Register temp = temps.Acquire(); + vixl32::Register temp; + // TODO: Remove this check when R4 is made a callee-save register + // in ART compiled code (b/72801708). Currently we need to make + // sure r4 is not blocked, e.g. in special purpose + // TestCodeGeneratorARMVIXL; also asserting that r4 is available + // here. + if (!blocked_core_registers_[R4]) { + for (vixl32::Register reg : kParameterCoreRegistersVIXL) { + DCHECK(!reg.Is(r4)); + } + DCHECK(!kCoreCalleeSaves.Includes(r4)); + temp = r4; + } else { + temp = temps.Acquire(); + } __ Sub(temp, sp, Operand::From(GetStackOverflowReservedBytes(InstructionSet::kArm))); // The load must immediately precede RecordPcInfo. ExactAssemblyScope aas(GetVIXLAssembler(), |