runtime: add alderlake variants

ADL was added to the build system in
aosp/Iec89c1358fea29f1b1d7a0433ad1d3b4375b8625. Even tiny CPUs like the
x7211E & N50 support AVX2 in this gen, so it can be assumed across the
board.

Bug: 372532555
Test: mma art
Test: TARGET_ARCH_VARIANT=alderlake; m
Change-Id: Ibbacfb05661f27291a509c97cab941472e228d09

2 files changed, 30 insertions, 0 deletions

diff --git a/runtime/arch/x86/instruction_set_features_x86.cc b/runtime/arch/x86/instruction_set_features_x86.cc
index 3f9978d942..2764d1ea26 100644
--- a/runtime/arch/x86/instruction_set_features_x86.cc
+++ b/runtime/arch/x86/instruction_set_features_x86.cc
@@ -49,6 +49,7 @@ static constexpr const char* x86_known_variants[] = {
     "goldmont-without-sha-xsaves",
     "tremont",
     "kabylake",
+    "alderlake",
     "default",
 };
 
@@ -60,6 +61,7 @@ static constexpr const char* x86_variants_with_ssse3[] = {
     "goldmont-plus",
     "goldmont-without-sha-xsaves",
     "tremont",
+    "alderlake",
     "kabylake",
 };
 
@@ -70,6 +72,7 @@ static constexpr const char* x86_variants_with_sse4_1[] = {
     "goldmont-plus",
     "goldmont-without-sha-xsaves",
     "tremont",
+    "alderlake",
     "kabylake",
 };
 
@@ -80,6 +83,7 @@ static constexpr const char* x86_variants_with_sse4_2[] = {
     "goldmont-plus",
     "goldmont-without-sha-xsaves",
     "tremont",
+    "alderlake",
     "kabylake",
 };
 
@@ -90,14 +94,17 @@ static constexpr const char* x86_variants_with_popcnt[] = {
     "goldmont-plus",
     "goldmont-without-sha-xsaves",
     "tremont",
+    "alderlake",
     "kabylake",
 };
 static constexpr const char* x86_variants_with_avx[] = {
     "kabylake",
+    "alderlake",
 };
 
 static constexpr const char* x86_variants_with_avx2[] = {
     "kabylake",
+    "alderlake",
 };
 
 X86FeaturesUniquePtr X86InstructionSetFeatures::Create(bool x86_64,
diff --git a/runtime/arch/x86/instruction_set_features_x86_test.cc b/runtime/arch/x86/instruction_set_features_x86_test.cc
index ddfec9a81e..e6d096cdd3 100644
--- a/runtime/arch/x86/instruction_set_features_x86_test.cc
+++ b/runtime/arch/x86/instruction_set_features_x86_test.cc
@@ -209,4 +209,27 @@ TEST(X86InstructionSetFeaturesTest, X86FeaturesFromKabylakeVariant) {
 
   EXPECT_FALSE(x86_64_features->Equals(x86_features.get()));
 }
+
+TEST(X86InstructionSetFeaturesTest, X86FeaturesFromAlderlakeVariant) {
+  // Build features for a 32-bit alderlake x86 processor.
+  std::string error_msg;
+  std::unique_ptr<const InstructionSetFeatures> x86_features(
+      InstructionSetFeatures::FromVariant(InstructionSet::kX86, "alderlake", &error_msg));
+  ASSERT_TRUE(x86_features.get() != nullptr) << error_msg;
+  EXPECT_EQ(x86_features->GetInstructionSet(), InstructionSet::kX86);
+  EXPECT_TRUE(x86_features->Equals(x86_features.get()));
+  EXPECT_STREQ("ssse3,sse4.1,sse4.2,avx,avx2,popcnt", x86_features->GetFeatureString().c_str());
+  EXPECT_EQ(x86_features->AsBitmap(), 63U);
+
+  // Build features for a 64-bit x86-64 alderlake processor.
+  std::unique_ptr<const InstructionSetFeatures> x86_64_features(
+      InstructionSetFeatures::FromVariant(InstructionSet::kX86_64, "alderlake", &error_msg));
+  ASSERT_TRUE(x86_64_features.get() != nullptr) << error_msg;
+  EXPECT_EQ(x86_64_features->GetInstructionSet(), InstructionSet::kX86_64);
+  EXPECT_TRUE(x86_64_features->Equals(x86_64_features.get()));
+  EXPECT_STREQ("ssse3,sse4.1,sse4.2,avx,avx2,popcnt", x86_64_features->GetFeatureString().c_str());
+  EXPECT_EQ(x86_64_features->AsBitmap(), 63U);
+
+  EXPECT_FALSE(x86_64_features->Equals(x86_features.get()));
+}
 }  // namespace art