diff options
| author | 2014-11-05 21:21:46 +0000 | |
|---|---|---|
| committer | 2014-11-05 21:21:46 +0000 | |
| commit | 77dbcdd24fc99938c37ab0a32373466838ec8880 (patch) | |
| tree | 2646dc486174f1e6fed9dbcfe834d8cc2d90c129 | |
| parent | 40845d266e1152a846858d94cee70c33b136de68 (diff) | |
| parent | 02c637e8d6952aba19a432e01fc94cece5071e2f (diff) | |
Merge "Fix LoadValue{Wide} to free temp when reg classes are not matched"
| -rw-r--r-- | compiler/dex/quick/gen_loadstore.cc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/compiler/dex/quick/gen_loadstore.cc b/compiler/dex/quick/gen_loadstore.cc index 39b40a09a2..d3146018d6 100644 --- a/compiler/dex/quick/gen_loadstore.cc +++ b/compiler/dex/quick/gen_loadstore.cc @@ -149,8 +149,9 @@ RegLocation Mir2Lir::LoadValue(RegLocation rl_src, RegisterClass op_kind) { // Wrong register class, realloc, copy and transfer ownership. RegStorage new_reg = AllocTypedTemp(rl_src.fp, op_kind); OpRegCopy(new_reg, rl_src.reg); - // Clobber the old reg. + // Clobber the old regs and free it. Clobber(rl_src.reg); + FreeTemp(rl_src.reg); // ...and mark the new one live. rl_src.reg = new_reg; MarkLive(rl_src); @@ -232,8 +233,9 @@ RegLocation Mir2Lir::LoadValueWide(RegLocation rl_src, RegisterClass op_kind) { // Wrong register class, realloc, copy and transfer ownership. RegStorage new_regs = AllocTypedTempWide(rl_src.fp, op_kind); OpRegCopyWide(new_regs, rl_src.reg); - // Clobber the old regs. + // Clobber the old regs and free it. Clobber(rl_src.reg); + FreeTemp(rl_src.reg); // ...and mark the new ones live. rl_src.reg = new_regs; MarkLive(rl_src); |