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| author | 2015-05-27 14:17:08 +0000 | |
|---|---|---|
| committer | 2015-05-27 14:17:08 +0000 | |
| commit | 6c70104dc3ecd66b46f56cae068a14e12021c9f2 (patch) | |
| tree | d0d23e3c54abf6b46185d169e7ef45d8c085db95 | |
| parent | f109cd2215ba23dac23a15eb64ad21ef2b15843c (diff) | |
| parent | 33bf2459e6cfe477a9be0c45aec3f6f359ee077c (diff) | |
Merge "[optimizing] x86: Prefer add over lea if possible"
| -rw-r--r-- | compiler/optimizing/code_generator_x86.cc | 2 | ||||
| -rw-r--r-- | compiler/optimizing/code_generator_x86_64.cc | 4 |
2 files changed, 6 insertions, 0 deletions
diff --git a/compiler/optimizing/code_generator_x86.cc b/compiler/optimizing/code_generator_x86.cc index a6f01dad38..597d27eb10 100644 --- a/compiler/optimizing/code_generator_x86.cc +++ b/compiler/optimizing/code_generator_x86.cc @@ -1959,6 +1959,8 @@ void InstructionCodeGeneratorX86::VisitAdd(HAdd* add) { if (second.IsRegister()) { if (out.AsRegister<Register>() == first.AsRegister<Register>()) { __ addl(out.AsRegister<Register>(), second.AsRegister<Register>()); + } else if (out.AsRegister<Register>() == second.AsRegister<Register>()) { + __ addl(out.AsRegister<Register>(), first.AsRegister<Register>()); } else { __ leal(out.AsRegister<Register>(), Address( first.AsRegister<Register>(), second.AsRegister<Register>(), TIMES_1, 0)); diff --git a/compiler/optimizing/code_generator_x86_64.cc b/compiler/optimizing/code_generator_x86_64.cc index f49c26db2b..68e0065e65 100644 --- a/compiler/optimizing/code_generator_x86_64.cc +++ b/compiler/optimizing/code_generator_x86_64.cc @@ -2117,6 +2117,8 @@ void InstructionCodeGeneratorX86_64::VisitAdd(HAdd* add) { if (second.IsRegister()) { if (out.AsRegister<Register>() == first.AsRegister<Register>()) { __ addl(out.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); + } else if (out.AsRegister<Register>() == second.AsRegister<Register>()) { + __ addl(out.AsRegister<CpuRegister>(), first.AsRegister<CpuRegister>()); } else { __ leal(out.AsRegister<CpuRegister>(), Address( first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>(), TIMES_1, 0)); @@ -2140,6 +2142,8 @@ void InstructionCodeGeneratorX86_64::VisitAdd(HAdd* add) { if (second.IsRegister()) { if (out.AsRegister<Register>() == first.AsRegister<Register>()) { __ addq(out.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>()); + } else if (out.AsRegister<Register>() == second.AsRegister<Register>()) { + __ addq(out.AsRegister<CpuRegister>(), first.AsRegister<CpuRegister>()); } else { __ leaq(out.AsRegister<CpuRegister>(), Address( first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>(), TIMES_1, 0)); |