diff options
| author | 2017-07-19 15:33:11 +0100 | |
|---|---|---|
| committer | 2017-07-19 15:34:09 +0100 | |
| commit | 520dadff2190a5bcdb48838dbcccddc8fbbf0c97 (patch) | |
| tree | 6e4eda47f0e258bf807b5ce0a62cb063b9f0407c | |
| parent | c5b1b067fb91c10c75dd0e6dbfd91bebe74347d5 (diff) | |
Unbreak Odroid measurements.
Odroid run Linux/target, which doesn't support ashmem.
Test: test.py
Change-Id: Icd92d2a87ea9987c9580037ef195f6e63641283d
| -rw-r--r-- | runtime/jit/jit_code_cache.cc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/runtime/jit/jit_code_cache.cc b/runtime/jit/jit_code_cache.cc index 8295f464af..5d6fa2fb74 100644 --- a/runtime/jit/jit_code_cache.cc +++ b/runtime/jit/jit_code_cache.cc @@ -101,14 +101,15 @@ JitCodeCache* JitCodeCache::Create(size_t initial_capacity, // Generating debug information is for using the Linux perf tool on // host which does not work with ashmem. - bool use_ashmem = !generate_debug_info; + // Also, target linux does not support ashmem. + bool use_ashmem = !generate_debug_info && !kIsTargetLinux; // With 'perf', we want a 1-1 mapping between an address and a method. bool garbage_collect_code = !generate_debug_info; // We only use two mappings (separating rw from rx) if we are able to use ashmem. // See the above comment for debug information and not using ashmem. - bool use_two_mappings = !generate_debug_info; + bool use_two_mappings = use_ashmem; // We need to have 32 bit offsets from method headers in code cache which point to things // in the data cache. If the maps are more than 4G apart, having multiple maps wouldn't work. |