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author Roland Levillain <rpl@google.com> 2017-04-19 13:23:28 +0000
committer Android (Google) Code Review <android-gerrit@google.com> 2017-04-19 13:23:28 +0000
commit275ece38c1feb61eb1d964d22f783936ea42f374 (patch)
tree90f3a61d8699cf9521c214a934b2f0363258acab
parent7ff1ef220ca6da0865e047efdec94b57b8f99303 (diff)
parent246d2917753a099de25004935a1d225f948ac18b (diff)
Merge "Fix ARM64 SystemArrayCopy intrinsic with large constant dest position." into oc-dev
-rw-r--r--compiler/optimizing/intrinsics_arm64.cc8
-rw-r--r--test/646-checker-arraycopy-large-cst-pos/expected.txt1
-rw-r--r--test/646-checker-arraycopy-large-cst-pos/info.txt4
-rw-r--r--test/646-checker-arraycopy-large-cst-pos/src/Main.java37
4 files changed, 50 insertions, 0 deletions
diff --git a/compiler/optimizing/intrinsics_arm64.cc b/compiler/optimizing/intrinsics_arm64.cc
index 423fd3c6ae..8485c32e39 100644
--- a/compiler/optimizing/intrinsics_arm64.cc
+++ b/compiler/optimizing/intrinsics_arm64.cc
@@ -2755,9 +2755,17 @@ void IntrinsicCodeGeneratorARM64::VisitSystemArrayCopy(HInvoke* invoke) {
// Make sure `tmp` is not IP0, as it is clobbered by
// ReadBarrierMarkRegX entry points in
// ReadBarrierSystemArrayCopySlowPathARM64.
+ DCHECK(temps.IsAvailable(ip0));
temps.Exclude(ip0);
Register tmp = temps.AcquireW();
DCHECK_NE(LocationFrom(tmp).reg(), IP0);
+ // Put IP0 back in the pool so that VIXL has at least one
+ // scratch register available to emit macro-instructions (note
+ // that IP1 is already used for `tmp`). Indeed some
+ // macro-instructions used in GenSystemArrayCopyAddresses
+ // (invoked hereunder) may require a scratch register (for
+ // instance to emit a load with a large constant offset).
+ temps.Include(ip0);
// /* int32_t */ monitor = src->monitor_
__ Ldr(tmp, HeapOperand(src.W(), monitor_offset));
diff --git a/test/646-checker-arraycopy-large-cst-pos/expected.txt b/test/646-checker-arraycopy-large-cst-pos/expected.txt
new file mode 100644
index 0000000000..b0aad4deb5
--- /dev/null
+++ b/test/646-checker-arraycopy-large-cst-pos/expected.txt
@@ -0,0 +1 @@
+passed
diff --git a/test/646-checker-arraycopy-large-cst-pos/info.txt b/test/646-checker-arraycopy-large-cst-pos/info.txt
new file mode 100644
index 0000000000..9ac21db411
--- /dev/null
+++ b/test/646-checker-arraycopy-large-cst-pos/info.txt
@@ -0,0 +1,4 @@
+Regression test for an issue with a depleted VIXL scratch register
+pool during the emission of a SystemArrayCopy intrinsic with a large
+constant destination position, on ARM64, with read barriers
+(b/37256530).
diff --git a/test/646-checker-arraycopy-large-cst-pos/src/Main.java b/test/646-checker-arraycopy-large-cst-pos/src/Main.java
new file mode 100644
index 0000000000..3144fc18e7
--- /dev/null
+++ b/test/646-checker-arraycopy-large-cst-pos/src/Main.java
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+public class Main {
+
+ public static void main(String[] args) {
+ System.out.println("passed");
+ }
+
+ /// CHECK-START-ARM64: void Main.test() disassembly (after)
+ /// CHECK: InvokeStaticOrDirect method_name:java.lang.System.arraycopy intrinsic:SystemArrayCopy
+ /// CHECK-NOT: blr
+ /// CHECK: ReturnVoid
+
+ static void test() {
+ Object[] src = new Object[1024];
+ Object[] dst = new Object[2048];
+ // The length of the copied data must not be too large (smaller
+ // than kSystemArrayCopyThreshold = 128) for the call to
+ // System.arraycopy to be intrinsified.
+ System.arraycopy(src, 0, dst, 1024, 64);
+ }
+
+}