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| author | 2015-08-17 22:24:30 +0000 | |
|---|---|---|
| committer | 2015-08-17 22:24:30 +0000 | |
| commit | 0d52a6738f55d9610f08d3be24270bd0eeb88edc (patch) | |
| tree | 7e38d12f9d19f1729af6f746f2fc6c72590ff3ab | |
| parent | b0aeeb777f6c2567a9ea038c9442c1df592b7e04 (diff) | |
| parent | 3996c89a49238037e852203e74b026015608fb0a (diff) | |
Merge "Correct for 115-native-bridge hard-coded x86/x86_64 signal handling values"
| -rw-r--r-- | test/115-native-bridge/nativebridge.cc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/test/115-native-bridge/nativebridge.cc b/test/115-native-bridge/nativebridge.cc index a6a6e08e26..04326b3028 100644 --- a/test/115-native-bridge/nativebridge.cc +++ b/test/115-native-bridge/nativebridge.cc @@ -203,9 +203,11 @@ static jint trampoline_Java_Main_testSignal(JNIEnv*, jclass) { // Test segv sigaction(SIGSEGV, &tmp, nullptr); -#if defined(__arm__) || defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) - // On supported architectures we cause a real SEGV. +#if defined(__arm__) || defined(__i386__) || defined(__aarch64__) *go_away_compiler = 'a'; +#elif defined(__x86_64__) + // Cause a SEGV using an instruction known to be 3 bytes long + asm volatile("movl $0, %%eax;" "movb $1, (%%eax);" : : : "%eax"); #else // On other architectures we simulate SEGV. kill(getpid(), SIGSEGV); |