power: Add known perf hint IDs
Author: Zhao Wei Liew <zhaoweiliew@gmail.com>
Date: Tue Jun 21 10:44:49 2016 +0800
power: msm8996: Support boost and perf profile hints
Change-Id: I010d4d1d3fb495e523b065c11ca95c4305530f9f
Author: Zhao Wei Liew <zhaoweiliew@gmail.com>
Date: Thu Oct 20 21:51:09 2016 +0800
power: msm8937: Improve boost values
* Bring boost values more in line with CAF's recommended values
* Make performance profile values saner
Change-Id: I9827d25a347a8ab959c766a71e30b3d29267983f
Author: Diogo Ferreira <diogo@underdev.org>
Date: Sun May 7 11:00:12 2017 +0100
power: Use the correct opcode for STOR_CLK_SCALE_DIS
This is actually wrong, 0x42C0C000 is the opcode for SWAP_RATIO and
0x42C10000 is the correct opcode for storage clock scale disabling.
Change-Id: I6b1db525acf061ffe419011acd1f91525a27a35d
Author: dianlujitao <dianlujitao@lineageos.org>
Date: Wed Sep 20 16:40:57 2017 +0800
power: sdm660: Use declared enums
Change-Id: I21691f9595f3730b9046012d1cae3951eb9da6a7
Author: dianlujitao <dianlujitao@lineageos.org>
Date: Sat Sep 23 20:22:17 2017 +0800
power: sdm660: Support boost and power profiles
* perfd needs /vendor/etc/appboosts.xml on sdm660 platform.
Change-Id: I92632da032ebd1a629fcc0b9c7e1811dee9117fe
Author: dianlujitao <dianlujitao@lineageos.org>
Date: Thu Sep 6 21:43:14 2018 +0800
power: Clean up hint IDs
* Group MPCTL v3 opcodes according to major type.
* Remove some unused/dead opcodes.
* Rename some misleading/inconsistency names.
Change-Id: I3a06930c8fff18a50f77cb230951dbd43d62fed3
Change-Id: I611ef9651486f6f3caa6a6d6a08434912c114659
diff --git a/performance.h b/performance.h
index a2c0b6b..7b40331 100644
--- a/performance.h
+++ b/performance.h
@@ -1,4 +1,5 @@
/* Copyright (c) 2012, 2014, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2018 The LineageOS Project
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -174,6 +175,7 @@
enum INTERACTIVE_HISPEED_FREQ_LVL {
HS_FREQ_1026 = 0xF0A,
+ HS_FREQ_800 = 0xF08,
};
enum INTERACTIVE_HISPEED_LOAD_LVL {
@@ -250,6 +252,95 @@
CPU7_MAX_FREQ_NONTURBO_MAX = 0x260A,
};
+enum SCHED_PREFER_IDLE {
+ SCHED_PREFER_IDLE_DIS = 0x3E01,
+};
+
+enum SCHED_MIGRATE_COST_CHNG {
+ SCHED_MIGRATE_COST_SET = 0x3F01,
+};
+
+/**
+ * MPCTL v3 opcodes
+ */
+/* 0x1 */
+enum POWER_COLLAPSE {
+ ALL_CPUS_PWR_CLPS_DIS_V3 = 0x40400000,
+};
+
+/* 0x2 */
+enum CPUFREQ {
+ MIN_FREQ_BIG_CORE_0 = 0x40800000,
+ MIN_FREQ_BIG_CORE_0_RESIDX = 0x40802000,
+ MIN_FREQ_LITTLE_CORE_0 = 0x40800100,
+ MIN_FREQ_LITTLE_CORE_0_RESIDX = 0x40802100,
+ MAX_FREQ_BIG_CORE_0 = 0x40804000,
+ MAX_FREQ_BIG_CORE_0_RESIDX = 0x40806000,
+ MAX_FREQ_LITTLE_CORE_0 = 0x40804100,
+ MAX_FREQ_LITTLE_CORE_0_RESIDX = 0x40806100,
+};
+
+/* 0x3 */
+enum SCHED {
+ SCHED_BOOST_ON_V3 = 0x40C00000,
+ SCHED_PREFER_IDLE_DIS_V3 = 0x40C04000,
+ SCHED_MIGRATE_COST_SET_V3 = 0x40C08000,
+ SCHED_SMALL_TASK = 0x40C0C000,
+ SCHED_MOSTLY_IDLE_LOAD = 0x40C10000,
+ SCHED_MOSTLY_IDLE_NR_RUN = 0x40C14000,
+ SCHED_GROUP_ON = 0x40C28000,
+ SCHED_SPILL_NR_RUN = 0x40C2C000,
+ SCHED_RESTRICT_CLUSTER_SPILL = 0x40C34000,
+ SCHED_GROUP_UP_MIGRATE = 0x40C54000,
+ SCHED_GROUP_DOWN_MIGRATE = 0x40C58000,
+};
+
+/* 0x4 */
+enum CORE_HOTPLUG {
+ CPUS_ONLINE_MIN_BIG = 0x41000000,
+ CPUS_ONLINE_MAX_BIG = 0x41004000,
+ CPUS_ONLINE_MIN_LITTLE = 0x41000100,
+ CPUS_ONLINE_MAX_LITTLE = 0x41004100,
+};
+
+/* 0x5 */
+enum INTERACTIVE {
+ ABOVE_HISPEED_DELAY_BIG = 0x41400000,
+ ABOVE_HISPEED_DELAY_BIG_RESIDX = 0x41402000,
+ GO_HISPEED_LOAD_BIG = 0x41410000,
+ HISPEED_FREQ_BIG = 0x41414000,
+ TARGET_LOADS_BIG = 0x41420000,
+ IGNORE_HISPEED_NOTIF_BIG = 0x41438000,
+ ABOVE_HISPEED_DELAY_LITTLE = 0x41400100,
+ ABOVE_HISPEED_DELAY_LITTLE_RESIDX = 0x41402100,
+ GO_HISPEED_LOAD_LITTLE = 0x41410100,
+ HISPEED_FREQ_LITTLE = 0x41414100,
+ TARGET_LOADS_LITTLE = 0x41420100,
+ IGNORE_HISPEED_NOTIF_LITTLE = 0x41438100,
+};
+
+/* 0x6 */
+enum CPUBW_HWMON {
+ CPUBW_HWMON_MIN_FREQ = 0x41800000,
+ CPUBW_HWMON_MIN_FREQ_RESIDX = 0x41802000,
+ CPUBW_HWMON_HYST_OPT = 0x4180C000,
+ LOW_POWER_CEIL_MBPS = 0x41810000,
+ LOW_POWER_IO_PERCENT = 0x41814000,
+ CPUBW_HWMON_SAMPLE_MS = 0x41820000,
+};
+
+/* 0xA */
+enum GPU {
+ GPU_MIN_POWER_LEVEL = 0x42804000,
+ GPU_MAX_POWER_LEVEL = 0x42808000,
+ GPU_MIN_FREQ = 0x4280C000,
+ GPU_MIN_FREQ_RESIDX = 0x4280E000,
+ GPU_MAX_FREQ = 0x42810000,
+ GPU_MAX_FREQ_RESIDX = 0x42812000,
+ GPUBW_MIN_FREQ = 0x42814000,
+ GPUBW_MAX_FREQ = 0x42818000,
+};
+
#ifdef __cplusplus
}
#endif