commit e90501da0222717d75c126ebf89569db3976927e
author Serguei Katkov <serguei.i.katkov@intel.com> Wed Mar 12 15:56:54 2014 +0700
committer Serguei Katkov <serguei.i.katkov@intel.com> Fri Mar 14 10:26:11 2014 +0700
tree dff0aabde02d0790bab3a42738e08a9b27eafb58
parent 4ee5bd67c7dd1ba42f8187e038cee3f96cc77839

Add dependency for operations with x86 FPU stack

Load Hoisting optimization can re-order operations with
FPU stack due to no dependency set.

Patch adds resource dependency between these operations.

Change-Id: Iccce98c8f3c565903667c03803884d9de1281ea8
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>

compiler/dex/quick/x86/x86_lir.h

diff --git a/compiler/dex/quick/x86/x86_lir.h b/compiler/dex/quick/x86/x86_lir.h
index 09cbbee..9fb0044 100644
--- a/compiler/dex/quick/x86/x86_lir.h
+++ b/compiler/dex/quick/x86/x86_lir.h
@@ -130,12 +130,14 @@
   kX86GPReg0   = 0,
   kX86RegSP    = 4,
   kX86FPReg0   = 16,  // xmm0 .. xmm7/xmm15.
-  kX86FPRegEnd   = 32,
-  kX86RegEnd   = kX86FPRegEnd,
+  kX86FPRegEnd = 32,
+  kX86FPStack  = 33,
+  kX86RegEnd   = kX86FPStack,
 };
 
 #define ENCODE_X86_REG_LIST(N)      (static_cast<uint64_t>(N))
 #define ENCODE_X86_REG_SP           (1ULL << kX86RegSP)
+#define ENCODE_X86_FP_STACK         (1ULL << kX86FPStack)
 
 enum X86NativeRegisterPool {
   r0     = 0,