Various bug fixes.
The most amusing fix was the wierd NaN test failure. After spending way
too much time debugging, it turned out to be a missing comma in the argument
list of the test launcher.
Change-Id: I76253575d7fbe2c2c260f1839a517c1b93dc9224
diff --git a/src/compiler/codegen/arm/Assemble.cc b/src/compiler/codegen/arm/Assemble.cc
index d9dd8c4..54e0aaf 100644
--- a/src/compiler/codegen/arm/Assemble.cc
+++ b/src/compiler/codegen/arm/Assemble.cc
@@ -1039,9 +1039,9 @@
&iterator);
if (tabRec == NULL) break;
alignBuffer(cUnit->codeBuffer, tabRec->offset);
- cUnit->codeBuffer.reserve(cUnit->codeBuffer.size() + (tabRec->size/2));
- memcpy(&cUnit->codeBuffer[tabRec->offset/2],
- (char*)tabRec->table, tabRec->size);
+ for (int i = 0; i < (tabRec->size / 2) ; i++) {
+ cUnit->codeBuffer.push_back( tabRec->table[i]);
+ }
}
}
diff --git a/src/compiler/codegen/arm/LocalOptimizations.cc b/src/compiler/codegen/arm/LocalOptimizations.cc
index 8d6f3a5..1aaeebf 100644
--- a/src/compiler/codegen/arm/LocalOptimizations.cc
+++ b/src/compiler/codegen/arm/LocalOptimizations.cc
@@ -439,10 +439,12 @@
LIR* tailLIR)
{
if (!(cUnit->disableOpt & (1 << kLoadStoreElimination))) {
+ LOG(INFO) << "Doing ldstElim, op: 0x" << std::hex << cUnit->disableOpt;
applyLoadStoreElimination(cUnit, (ArmLIR* ) headLIR,
(ArmLIR* ) tailLIR);
}
if (!(cUnit->disableOpt & (1 << kLoadHoisting))) {
+ LOG(INFO) << "Doing hoisting, op: 0x" << std::hex << cUnit->disableOpt;
applyLoadHoisting(cUnit, (ArmLIR* ) headLIR, (ArmLIR* ) tailLIR);
}
}
diff --git a/src/compiler/codegen/arm/MethodCodegenDriver.cc b/src/compiler/codegen/arm/MethodCodegenDriver.cc
index f7194f1..1cf3766 100644
--- a/src/compiler/codegen/arm/MethodCodegenDriver.cc
+++ b/src/compiler/codegen/arm/MethodCodegenDriver.cc
@@ -1455,15 +1455,12 @@
genArithOpLong(cUnit, mir, rlDest, rlSrc[0], rlSrc[1]);
break;
- case OP_SHL_LONG_2ADDR:
- case OP_SHR_LONG_2ADDR:
- case OP_USHR_LONG_2ADDR:
- genShiftOpLong(cUnit,mir, rlDest, rlSrc[0], rlSrc[0]);
- break;
-
case OP_SHL_LONG:
case OP_SHR_LONG:
case OP_USHR_LONG:
+ case OP_SHL_LONG_2ADDR:
+ case OP_SHR_LONG_2ADDR:
+ case OP_USHR_LONG_2ADDR:
genShiftOpLong(cUnit,mir, rlDest, rlSrc[0], rlSrc[1]);
break;
diff --git a/src/compiler/codegen/arm/Thumb2/Gen.cc b/src/compiler/codegen/arm/Thumb2/Gen.cc
index 2239bd9..992eca6 100644
--- a/src/compiler/codegen/arm/Thumb2/Gen.cc
+++ b/src/compiler/codegen/arm/Thumb2/Gen.cc
@@ -342,7 +342,7 @@
loadValueDirectFixed(cUnit, rlSrc, r0);
loadWordDisp(cUnit, rSELF,
OFFSETOF_MEMBER(Thread, pArtHandleFillArrayDataNoThrow), rLR);
- // Materialize a pointer to the switch table
+ // Materialize a pointer to the fill data image
newLIR3(cUnit, kThumb2AdrST, r1, 0, (intptr_t)tabRec);
opReg(cUnit, kOpBlx, rLR);
oatClobberCallRegs(cUnit);
@@ -1358,11 +1358,6 @@
oatFlushAllRegs(cUnit); /* Send everything to home location */
loadWordDisp(cUnit, rSELF, funcOffset, rLR);
loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
- if (rlShift.wide) {
- LOG(WARNING) << "Invalid RegLocation size - dataflow problem";
- LOG(WARNING) << " sReg[" << rlShift.sRegLow << "]";
- rlShift.wide = false;
- }
loadValueDirect(cUnit, rlShift, r2);
opReg(cUnit, kOpBlx, rLR);
oatClobberCallRegs(cUnit);