tree 97fcb17ae74a587c6ef756dda6f4b03db5e9950f
parent 1e97c4a4ab9f17d1394b952882d59d894b1e3c74
author Mark Mendell <mark.p.mendell@intel.com> 1398804920 -0400
committer buzbee <buzbee@google.com> 1400263467 -0700

ART: Add support for constant vector literals

Add in some vector instructions.  Implement the ConstVector
instruction, which takes 4 words of data and loads it into
an XMM register.

Initially, only the ConstVector MIR opcode is implemented. Others will
be added after this one goes in.

Change-Id: I5c79bc8b7de9030ef1c213fc8b227debc47f6337
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>