ART: Refactor SIMD slots and regs size processing.
ART vectorizer assumes that there is single size of SIMD
register used for the whole program. Make this assumption explicit
and refactor the code.
Note: This is a base for the future introduction of SIMD slots of
size other than 8 or 16 bytes.
Test: test-art-target, test-art-host.
Change-Id: Id699d5e3590ca8c655ecd9f9ed4e63f49e3c4f9c
diff --git a/compiler/optimizing/optimization.cc b/compiler/optimizing/optimization.cc
index 7024660..fb60c01 100644
--- a/compiler/optimizing/optimization.cc
+++ b/compiler/optimizing/optimization.cc
@@ -214,7 +214,7 @@
case OptimizationPass::kLoopOptimization:
CHECK(most_recent_induction != nullptr);
opt = new (allocator) HLoopOptimization(
- graph, &codegen->GetCompilerOptions(), most_recent_induction, stats, pass_name);
+ graph, *codegen, most_recent_induction, stats, pass_name);
break;
case OptimizationPass::kBoundsCheckElimination:
CHECK(most_recent_side_effects != nullptr && most_recent_induction != nullptr);