ART: Refactor SIMD slots and regs size processing.
ART vectorizer assumes that there is single size of SIMD
register used for the whole program. Make this assumption explicit
and refactor the code.
Note: This is a base for the future introduction of SIMD slots of
size other than 8 or 16 bytes.
Test: test-art-target, test-art-host.
Change-Id: Id699d5e3590ca8c655ecd9f9ed4e63f49e3c4f9c
diff --git a/compiler/optimizing/locations.h b/compiler/optimizing/locations.h
index d56c151..5e7e74b 100644
--- a/compiler/optimizing/locations.h
+++ b/compiler/optimizing/locations.h
@@ -281,6 +281,19 @@
return GetKind() == kSIMDStackSlot;
}
+ static Location StackSlotByNumOfSlots(size_t num_of_slots, int spill_slot) {
+ DCHECK_NE(num_of_slots, 0u);
+ switch (num_of_slots) {
+ case 1u:
+ return Location::StackSlot(spill_slot);
+ case 2u:
+ return Location::DoubleStackSlot(spill_slot);
+ default:
+ // Assume all other stack slot sizes correspond to SIMD slot size.
+ return Location::SIMDStackSlot(spill_slot);
+ }
+ }
+
intptr_t GetStackIndex() const {
DCHECK(IsStackSlot() || IsDoubleStackSlot() || IsSIMDStackSlot());
// Decode stack index manually to preserve sign.