commit c6301bcfbefa1c320f922d2209caee3481dc1aa2
author Andreas Gampe <agampe@google.com> Fri Jun 27 08:43:05 2014 -0700
committer Andreas Gampe <agampe@google.com> Fri Jun 27 08:43:44 2014 -0700
tree c373f01c8782f05a16b908c6ab35faf4fcbe0fc7
parent aec31aaef2750c620528a35491fd4d9a23f5be7c

ART: ARM64 fp return reg locations are FP

Change-Id: Ica14b63ebde8efda113a146939309a6c37adc9aa

compiler/dex/quick/arm64/arm64_lir.h

diff --git a/compiler/dex/quick/arm64/arm64_lir.h b/compiler/dex/quick/arm64/arm64_lir.h
index 1f1a252..ac5f33b 100644
--- a/compiler/dex/quick/arm64/arm64_lir.h
+++ b/compiler/dex/quick/arm64/arm64_lir.h
@@ -181,9 +181,9 @@
 const RegLocation arm_loc_c_return_wide =
     {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, rs_x0, INVALID_SREG, INVALID_SREG};
 const RegLocation arm_loc_c_return_float =
-    {kLocPhysReg, 0, 0, 0, 0, 0, 0, 0, 1, rs_f0, INVALID_SREG, INVALID_SREG};
+    {kLocPhysReg, 0, 0, 0, 1, 0, 0, 0, 1, rs_f0, INVALID_SREG, INVALID_SREG};
 const RegLocation arm_loc_c_return_double =
-    {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, rs_d0, INVALID_SREG, INVALID_SREG};
+    {kLocPhysReg, 1, 0, 0, 1, 0, 0, 0, 1, rs_d0, INVALID_SREG, INVALID_SREG};
 
 /**
  * @brief Shift-type to be applied to a register via EncodeShift().