commit c5159d55ca8e9022b748176f9f53676e8e9d4cd2
author buzbee <buzbee@google.com> Sat Mar 03 11:48:39 2012 -0800
committer buzbee <buzbee@google.com> Sat Mar 03 16:32:24 2012 -0800
tree d407a682788fbbca4dbd0821350058a3c2901617
parent 5b455485c1deda58959fdc410050e01448c032c2

MIPS switch table support

And 64-bit neg/add/sub (ouch! Mips has no carry bit...)

Change-Id: Ifb94324a0052d6069977fb8f22679b95890445d8

src/compiler/codegen/mips/MipsLIR.h

diff --git a/src/compiler/codegen/mips/MipsLIR.h b/src/compiler/codegen/mips/MipsLIR.h
index b2cfdbe..5034623 100644
--- a/src/compiler/codegen/mips/MipsLIR.h
+++ b/src/compiler/codegen/mips/MipsLIR.h
@@ -426,6 +426,10 @@
     kMipsMfc1,    /* mfc1 t,s [01000100000] t[20..16] s[15..11] [00000000000] */
     kMipsMtc1,    /* mtc1 t,s [01000100100] t[20..16] s[15..11] [00000000000] */
 #endif
+    kMipsDelta,   /* Psuedo for ori t, s, <label>-<label> */
+    kMipsDeltaHi, /* Pseudo for lui t, high16(<label>-<label>) */
+    kMipsDeltaLo, /* Pseudo for ori t, s, low16(<label>-<label>) */
+    kMipsCurrPC,  /* jal to .+8 to materialize pc */
     kMipsUndefined,  /* undefined [011001xxxxxxxxxxxxxxxx] */
     kMipsLast
 } MipsOpCode;
@@ -458,6 +462,7 @@
     kMemLoad,
     kMemStore,
     kPCRelFixup,
+    kRegUseLR,
 // FIXME: add NEEDS_FIXUP to instruction attributes
 } MipsOpFeatureFlags;
 
@@ -486,7 +491,8 @@
 #define IS_IT           (1 << kIsIT)
 #define SETS_CCODES     (1 << kSetsCCodes)
 #define USES_CCODES     (1 << kUsesCCodes)
-#define NEEDS_FIXUP      (1 << kPCRelFixup)
+#define NEEDS_FIXUP     (1 << kPCRelFixup)
+#define REG_USE_LR      (1 << kRegUseLR)
 
 /*  attributes, included for compatibility */
 #define REG_DEF_FPCS_LIST0   (0)
@@ -513,6 +519,7 @@
     kFmtBitBlt,        /* Bit string using end/start */
     kFmtDfp,           /* Double FP reg */
     kFmtSfp,           /* Single FP reg */
+    kFmtBlt5_2,        /* Same 5-bit field to 2 locations */
 } MipsEncodingKind;
 
 /* Struct used to define the snippet positions for each Thumb opcode */