commit bff2465abb4b0c097623c82f18a1307ea890bff1
author buzbee <buzbee@google.com> Sun May 06 16:22:05 2012 -0700
committer buzbee <buzbee@google.com> Sun May 06 16:30:57 2012 -0700
tree aee1448eec34b9e5bf8c41fc9f83559ca5f49fd7
parent d0379748bd05b949a8e2193b44ddf4950f9569a8

[Compiler] Add object ref discovery

Previously, the compiler ran a type inference pass to identify floating
point uses for register allocation.  The grand plan involves moving
all type inference into the Art compiler driver (using the results from
verification).  As a short-term workaround, this CL adds object reference
discovery to the type inference pass.  This is needed for LLVM-IR generation.

Change-Id: I655806264181bfd26ab9340582a02c657cd3f678

src/compiler/codegen/MethodCodegenDriver.cc

diff --git a/src/compiler/codegen/MethodCodegenDriver.cc b/src/compiler/codegen/MethodCodegenDriver.cc
index 8d6bf54..b75b9a8 100644
--- a/src/compiler/codegen/MethodCodegenDriver.cc
+++ b/src/compiler/codegen/MethodCodegenDriver.cc
@@ -21,7 +21,7 @@
 #define DISPLAY_MISSING_TARGETS (cUnit->enableDebug & \
                                  (1 << kDebugDisplayMissingTargets))
 
-const RegLocation badLoc = {kLocDalvikFrame, 0, 0, 0, 0, 0, 0,
+const RegLocation badLoc = {kLocDalvikFrame, 0, 0, 0, 0, 0, 0, 0,
                             INVALID_REG, INVALID_REG, INVALID_SREG};
 
 /* Mark register usage state and return long retloc */
@@ -179,30 +179,37 @@
   int attrs = oatDataFlowAttributes[opcode];
   rlSrc[0] = rlSrc[1] = rlSrc[2] = badLoc;
   if (attrs & DF_UA) {
-    rlSrc[nextLoc++] = oatGetSrc(cUnit, mir, nextSreg);
-    nextSreg++;
-  } else if (attrs & DF_UA_WIDE) {
-    rlSrc[nextLoc++] = oatGetSrcWide(cUnit, mir, nextSreg, nextSreg + 1);
-    nextSreg+= 2;
+    if (attrs & DF_A_WIDE) {
+      rlSrc[nextLoc++] = oatGetSrcWide(cUnit, mir, nextSreg, nextSreg + 1);
+      nextSreg+= 2;
+    } else {
+      rlSrc[nextLoc++] = oatGetSrc(cUnit, mir, nextSreg);
+      nextSreg++;
+    }
   }
   if (attrs & DF_UB) {
-    rlSrc[nextLoc++] = oatGetSrc(cUnit, mir, nextSreg);
-    nextSreg++;
-  } else if (attrs & DF_UB_WIDE) {
-    rlSrc[nextLoc++] = oatGetSrcWide(cUnit, mir, nextSreg, nextSreg + 1);
-    nextSreg+= 2;
+    if (attrs & DF_B_WIDE) {
+      rlSrc[nextLoc++] = oatGetSrcWide(cUnit, mir, nextSreg, nextSreg + 1);
+      nextSreg+= 2;
+    } else {
+      rlSrc[nextLoc++] = oatGetSrc(cUnit, mir, nextSreg);
+      nextSreg++;
+    }
   }
   if (attrs & DF_UC) {
-    rlSrc[nextLoc++] = oatGetSrc(cUnit, mir, nextSreg);
-  } else if (attrs & DF_UC_WIDE) {
-    rlSrc[nextLoc++] = oatGetSrcWide(cUnit, mir, nextSreg, nextSreg + 1);
+    if (attrs & DF_C_WIDE) {
+      rlSrc[nextLoc++] = oatGetSrcWide(cUnit, mir, nextSreg, nextSreg + 1);
+    } else {
+      rlSrc[nextLoc++] = oatGetSrc(cUnit, mir, nextSreg);
+    }
   }
   if (attrs & DF_DA) {
-    rlDest = oatGetDest(cUnit, mir, 0);
-  } else if (attrs & DF_DA_WIDE) {
-    rlDest = oatGetDestWide(cUnit, mir, 0, 1);
+    if (attrs & DF_A_WIDE) {
+      rlDest = oatGetDestWide(cUnit, mir, 0, 1);
+    } else {
+      rlDest = oatGetDest(cUnit, mir, 0);
+    }
   }
-
   switch (opcode) {
     case Instruction::NOP:
       break;