commit befbd5731ecca08f08780ee28a913d08ffb14656
author Ian Rogers <irogers@google.com> Thu Mar 06 01:13:39 2014 -0800
committer Ian Rogers <irogers@google.com> Thu Mar 06 01:34:07 2014 -0800
tree ee359fc38671950afa91d96bf8c29232a799b628
parent 97c3d61e46a3678dac848578c686c724ec3397fa

Fix host architecture for 64bit.

Also, hack x86 assembler for use as a x86-64 trampoline compiler's assembler.
Implement missing x86-64 quick resolution trampoline.
Add x86-64 to the quick elf writer.

Change-Id: I08216c67014a83492ada12898ab8000218ba7bb4

compiler/utils/assembler.cc

diff --git a/compiler/utils/assembler.cc b/compiler/utils/assembler.cc
index 6732476..a7cb278 100644
--- a/compiler/utils/assembler.cc
+++ b/compiler/utils/assembler.cc
@@ -111,7 +111,8 @@
       return new arm64::Arm64Assembler();
     case kMips:
       return new mips::MipsAssembler();
-    case kX86:
+    case kX86:  // Fall-through.
+    case kX86_64:
       return new x86::X86Assembler();
     default:
       LOG(FATAL) << "Unknown InstructionSet: " << instruction_set;

compiler/utils/x86/assembler_x86.cc

diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc
index 136d248..26300e0 100644
--- a/compiler/utils/x86/assembler_x86.cc
+++ b/compiler/utils/x86/assembler_x86.cc
@@ -1210,6 +1210,13 @@
   return this;
 }
 
+X86Assembler* X86Assembler::gs() {
+  // TODO: fs is a prefix and not an instruction
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x65);
+  return this;
+}
+
 void X86Assembler::AddImmediate(Register reg, const Immediate& imm) {
   int value = imm.value();
   if (value > 0) {

compiler/utils/x86/assembler_x86.h

diff --git a/compiler/utils/x86/assembler_x86.h b/compiler/utils/x86/assembler_x86.h
index 0fa8e00..e284d8c 100644
--- a/compiler/utils/x86/assembler_x86.h
+++ b/compiler/utils/x86/assembler_x86.h
@@ -192,15 +192,21 @@
     }
   }
 
-  static Address Absolute(uword addr) {
+  static Address Absolute(uword addr, bool has_rip = false) {
     Address result;
-    result.SetModRM(0, EBP);
-    result.SetDisp32(addr);
+    if (has_rip) {
+      result.SetModRM(0, ESP);
+      result.SetSIB(TIMES_1, ESP, EBP);
+      result.SetDisp32(addr);
+    } else {
+      result.SetModRM(0, EBP);
+      result.SetDisp32(addr);
+    }
     return result;
   }
 
-  static Address Absolute(ThreadOffset addr) {
-    return Absolute(addr.Int32Value());
+  static Address Absolute(ThreadOffset addr, bool has_rip = false) {
+    return Absolute(addr.Int32Value(), has_rip);
   }
 
  private:
@@ -210,9 +216,9 @@
 };
 
 
-class X86Assembler : public Assembler {
+class X86Assembler FINAL : public Assembler {
  public:
-  X86Assembler() {}
+  explicit X86Assembler() {}
   virtual ~X86Assembler() {}
 
   /*
@@ -427,6 +433,7 @@
   void mfence();
 
   X86Assembler* fs();
+  X86Assembler* gs();
 
   //
   // Macros for High-level operations.